W532 Datasheet, PDF (1/8 Pages) Cypress Semiconductor – Frequency Multiplying, Peak Reducing EMI Solution

W532
Features
Frequency Multiplying, Peak Reducing EMI Solution
Table 1. Output Frequency Range Selection
• Cypress PREMIS™ family offering
• Generates an EMI optimized clocking signal at the
output
• Selectable frequency range and multiplication factor
• Single 1.25% or 5% center spread output
• Integrated loop filter components
• Operates with a 3.3V or 5V supply
• Low power CMOS design
• Available in 16-pin SOIC
Key Specifications
Supply Voltages: ........................................V_DD = 3.3V ±0.3V
or V_DD = 5V ±10%
Frequency Range: .........................15 MHz ≤ F_out ≤ 120 MHz
Cycle to Cycle Jitter: ......................................... 150 ps (typ.)
Output Duty Cycle: ............................... 40/60% (worst case)
Output Rise and Fall Time ................................... 5 ns (max.)
OR2
0
0
1
1
OR1
0
1
0
1
Output Range
(Multiplication Factor Selection)
reserved
15 MHz ≤ F_IN ≤ 30 MHz
30 MHz ≤ F_IN ≤ 60 MHz
60 MHz ≤ F_IN ≤ 120 MHz
Table 2. Modulation Width Selection
MW
Output
0
F_avg + 0.625% ≥ F_out ≥ F_avg – 0.625%
1
F_avg + 2.5% ≥ F_out ≥ F_avg – 2.5%
Table 3. Input Frequency Range Selection
IR2
IR1
0
0
0
1
1
0
1
1
Input Range
reserved
15 MHz ≤ F_IN ≤ 30 MHz
30 MHz ≤ F_IN ≤ 60 MHz
60 MHz ≤ F_IN ≤ 120 MHz
Simplified Block Diagram
3.3V or 5.0V
XTAL
Input
X1
X2
W532
Spread Spectrum
Output
(EMI suppressed)
3.3V or 5.0V
Pin Configuration
SOIC
X1 1
X2 2
AVDD 3
*OR1 4
NC 5
AGND 6
^OR2 7
*SSON# 8
16 VDD
15 GND
14 IR1^
13 ^{IR2^}
12 SSOUT
11 GND
10 VDD
9 MW*
Oscillator or
Reference Input
X1
W532
Spread Spectrum
Output
(EMI suppressed)
Notes:
1. ^ pins have internal pull-up
2. * pins have internal pull-down
PREMIS is a trademark of Cypress Semiconductor.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-07253 Rev. *A
Revised December 28, 2002