W245-30 Datasheet, PDF (1/12 Pages) Cypress Semiconductor – Frequency Multiplying, Peak Reducing EMI Solution

0
W245-30
Frequency Multiplying, Peak Reducing EMI Solution
Features
• Cypress PREMIS™ family offering
• Generates an EMI optimized clocking signal at the out-
put
• Selectable output frequency range
• Single 1.25%, 2.5%, 5% or 10% down or center spread
output
• Integrated loop filter components
• Operates with a 3.3 or 5V supply
• Low power CMOS design
• Available in 20-pin SSOP (Small Shrunk Outline Pack-
age)
Key Specifications
Supply Voltages:......................................... V_DD = 3.3V±0.3V
or V_DD = 5V±10%
Frequency range: ........................... 13 MHz < F_in < 120 MHz
Cycle to Cycle Jitter: .........................................250 ps (max)
Output duty cycle: .................................40/60% (worst case)
Simplified Block Diagram
3.3V or 5.0V
XTAL
Input
X1
X2
W245-30
SDATA
SCLK
IIC Interface
Spread Spectrum
Output
(EMI suppressed)
3.3V or 5.0V
Oscillator or
Reference Input
X1
SDATA
SCLK
W245-30
IIC Interface
Spread Spectrum
Output
(EMI suppressed)
Pin Configuration^{[1, 2]}
SSOP
X1 1
X2 2
AVDD 3
MW0^ 4
SDATA 5
OR1^ 6
SCLK 7
GND 8
OR2* 9
SSON#^ 10
20 REFOUT
19 VDD
18 GND
17 IR1*
16 ^IR2*
15 SSOUT
14 MW1*
13 GND
12 VDD
11 MW2^
Notes:
1. Pins marked with ^ are internal pull-down resistors with
weak 250 kΩ.
2. Pins marked with * are internal pull-up resistors with weak
80 kΩ.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-07229 Rev. *B
Revised August 13, 2002