English
Language : 

W180_05 Datasheet, PDF (1/10 Pages) Cypress Semiconductor – Peak Reducing EMI Solution
W180
Peak Reducing EMI Solution
Features
• Cypress PREMIS™ family offering
• Generates an EMI optimized clocking signal at the
output
• Selectable output frequency range
• Single 1.25% or 3.75% down or center spread output
• Integrated loop filter components
• Operates with a 3.3V or 5V supply
• Low power CMOS design
• Available in 8-pin SOIC (Small Outline Integrated
Circuit)
Key Specifications
Supply Voltages:............................................VDD = 3.3V±5%
or VDD = 5V±10%
Frequency Range:...............................8 MHz < Fin < 28 MHz
Cycle to Cycle Jitter: ........................................300 ps (max.)
Selectable Spread Percentage:.................... 1.25% or 3.75%
Output Duty Cycle: ............................... 40/60% (worst case)
Output Rise and Fall Time:...................................5 ns (max.)
Simplified Block Diagram
3.3V or 5.0V
XTAL
Input
X1
X2
W180
Spread Spectrum
Output
(EMI suppressed)
3.3V or 5.0V
Table 1. Modulation Width Selection
W180-01, 02, 03
SS%
Output
W180-51, 52, 53
Output
0 Fin > Fout > Fin – 1.25% Fin + 0.625% > Fin > – 0.625%
1 Fin > Fout > Fin – 3.75% Fin + 1.875% > Fin > –1.875%
Table 2. Frequency Range Selection
W180 Option#
FS2 FS1
-01, 51
(MHz)
-02, 52
(MHz)
-03, 53
(MHz)
0
0 8 < FIN < 10 8 < FIN < 10
N/A
0
1 10 < FIN < 15 10 < FIN < 15
N/A
1
0 15 < FIN < 18
N/A
15 < FIN < 18
1
1 18 < FIN < 28
N/A
18 < FIN < 28
Pin Configurations
SOIC
CLKIN or X1 1
NC or X2 2
GND 3
SS% 4
8 FS2
7 FS1
6 VDD
5 CLKOUT
CLKIN or X1 1
NC or X2 2
GND 3
SS% 4
8 SSON#
7 FS1
6 VDD
5 CLKOUT
Oscillator or
Reference Input
W180
Spread Spectrum
Output
(EMI suppressed)
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-07156 Rev. *B
Revised October 5, 2005