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MB95650L Datasheet, PDF (1/105 Pages) Cypress Semiconductor – F2MC-8FX CPU core | |||
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MB95650L Series
New 8FX 8-bit Microcontrollers
The MB95650L Series is a series of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the
microcontrollers of this series contain a variety of peripheral functions.
Features
F2MC-8FX CPU core
Instruction set optimized for controllers
â Multiplication and division instructions
â 16-bit arithmetic operations
â Bit test branch instructions
â Bit manipulation instructions, etc.
Clock
â Selectable main clock source
â Main oscillation clock (up to 16.25 MHz, maximum machine
clock frequency: 8.125 MHz)
â External clock (up to 32.5 MHz, maximum machine clock
frequency: 16.25 MHz)
â Main CR clock (4 MHz ï±2%)
â Main CR PLL clock
⢠The main CR PLL clock frequency becomes 8 MHz ï±2%
when the PLL multiplication rate is 2.
⢠The main CR PLL clock frequency becomes 10 MHz ï±2%
when the PLL multiplication rate is 2.5.
⢠The main CR PLL clock frequency becomes 12 MHz ï±2%
when the PLL multiplication rate is 3.
⢠The main CR PLL clock frequency becomes 16 MHz ï±2%
when the PLL multiplication rate is 4.
â Main PLL clock (maximum machine clock frequency:
16 MHz)
â Selectable subclock source
â Suboscillation clock (32.768 kHz)
â External clock (32.768 kHz)
â Sub-CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 150 kHz)
Timer
â 8/16-bit composite timer ï´ 2 channels
â Time-base timer ï´ 1 channel
â Watch prescaler ï´ 1 channel
UART/SIO ï´ 1 channel (The channel can be used either
as a UART/SIO channel or as an I2C bus interface
channel.)
â
The function of
UART/SIO and
this
I2C
channel can be
bus interface.
switched
between
â Full duplex double buffer
â Capable of clock asynchronous (UART) serial data transfer and
clock synchronous (SIO) serial data transfer
I2C bus interface ï´ 2 channels (One of the two channels
can be used either as an I2C bus interface channel or
as a UART/SIO channel.)
â Supports Standard-mode and Fast-mode (400 kHz).
â Built-in wake-up function
LIN-UART
â Full duplex double buffer
â Capable of clock asynchronous serial data transfer and clock
synchronous serial data transfer
External interrupt ï´ 6 channels
â Interrupt by edge detection (rising edge, falling edge, and both
edges can be selected)
â Can be used to wake up the device from different low power
consumption (standby) modes
8/12-bit A/D converter ï´ 6 channels
8-bit or 12-bit resolution can be selected.
Low power consumption (standby) modes
There are four standby modes as follows:
â Stop mode
â Sleep mode
â Watch mode
â Time-base timer mode
I/O port
â MB95F652E/F653E/F654E/F656E (number of I/O ports: 21)
â General-purpose I/O ports (CMOS I/O)
: 17
â General-purpose I/O ports (N-ch open drain) : 4
â MB95F652L/F653L/F654L/F656L (number of I/O ports: 20)
â General-purpose I/O ports (CMOS I/O)
: 17
â General-purpose I/O ports (N-ch open drain) : 3
On-chip debug
â 1-wire serial control
â Serial writing supported (asynchronous mode)
Hardware/software watchdog timer
â Built-in hardware watchdog timer
â Built-in software watchdog timer
Cypress Semiconductor Corporation ⢠198 Champion Court
Document Number: 002-04696 Rev. *A
⢠San Jose, CA 95134-1709 ⢠408-943-2600
Revised April 12, 2016
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