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CYRS1049DV33 Datasheet, PDF (1/16 Pages) Cypress Semiconductor – 4-Mbit (512 K × 8) Static RAM | |||
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CYRS1049DV33
4-Mbit (512 K Ã 8) Static RAM
with RadStop⢠Technology
4-Mbit (512 K à 8) Static RAM with RadStop⢠Technology
Radiation Performance
Radiation Data
⥠Total dose ï½ï 300 Krad
⥠Soft error rate (both heavy ion and proton)
Heavy ions ï£ 1 à 10-10 upsets/bit-day with single-error
correction, double error detection error detection and
correction (SEC-DED EDAC)
⥠Neutron = 2.0 à 1014 N/cm2
⥠Dose rate > 2.0 à 109 (rad(Si)/s)
⥠Latch up immunity LET = 120 MeV.cm2/mg (125 ï°C)
Processing Flows
⥠V grade - Class V flow in compliance with MIL-PRF 38535
Prototyping Options
⥠Non qualified manufacturers list (QML) V grade
CYPT1049DV33 devices with same functional and timing
characteristics in a 36-pin ceramic flat package
Features
⥠Temperature ranges
⥠Military/Space: â55 °C to 125 °C
⥠High speed
⥠tAA = 12 ns
⥠Low active power
⥠ICC = 95 mA at 12 ns (PMAX = 315 mW)
⥠Low CMOS standby power
⥠ISB2 = 15 mA
⥠2.0 V data retention
⥠Automatic power-down when deselected
⥠Transistor-transistor logic (TTL) compatible inputs and outputs
⥠Easy memory expansion with CE and OE features
⥠Available in Pb-free 36-pin ceramic flat package
Logic Block Diagram
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
CE
WE
OE
INPUT BUFFER
512K x 8
ARRAY
COLUMN DECODER
POWER
DOWN
IIO/O00
IIO/O1 1
II/OO22
IIO/O3 3
IIO/O4 4
IIO/O5 5
IIO/O6 6
IIO/O7 7
Cypress Semiconductor Corporation ⢠198 Champion Court
Document Number: 001-64292 Rev. *C
⢠San Jose, CA 95134-1709 ⢠408-943-2600
Revised March 19, 2012
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