CYM9260 Datasheet, PDF (1/12 Pages) Cypress Semiconductor – 64K(128K, 256K, 512K) x 72 SRAM Module

62A
CYM9260
CYM9261B
CYM9262A
CYM9263
Features
• Operates at 66 MHz
• Uses 64K x 18, 128K x 18, or 256K x 18 high performance
synchronous SRAMs
• 168-position Angled DIMM from Amp p/n 179508-2
• 3.3V inputs/data outputs
Functional Description
The CYM9260, CYM9261, CYM9262, and the CYM9263 are
high-performance synchronous memory modules organized
as 64K(9260), 128K(9261), 256K(9262), or 512K(9263) by 72
bits. These modules are constructed from either 128K x
18(9260,9261B,9262A) or 256K x 18 (9263) SRAMs in plastic
64K x 72 SRAM Module
128K x 72 SRAM Module
256K x 72 SRAM Module
512K x 72 SRAM Module
surface mount packages on an epoxy laminate board with
pins. The modules are designed to be incorporated into large
memory arrays.
The module is configured as either one or two banks, where
each bank has separate chip select and output enable con-
trols. Separate clocks are provided for every pair of SRAMs’s.
Multiple ground pins and on-board decoupling capacitors en-
sure high performance with maximum noise immunity.
All components on the cache modules are surface mounted on
a multi-layer epoxy laminate (FR-4) substrate. The contact
pins are plated with 150 micro-inches of nickel covered by 30
micro-inches of gold flash.
Logic Block Diagram - CYM9260
A[15:0]
V_cc3
R4
V_cc3
R2
WE[7:0]
ADSP
OE[0:1]
CS[0:1]
R3
DQ[0:15]
A_15:0 DQP[0:1]
OE0
CS0
ADSP
OE
CS
WEH
WEL
R1
ADSC
CLK
D[0:63]
DP[0:7]
CLK[0:3]
BANK 0
R1, R2, R3, R4 are optional resistors
R1, R2, R4 are mounted for access using ADSC
R3, R2, R4 are mounted for access using ADSP
64Kx72
PD₁ PD₀
GND NC BANK 0
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-05002 Rev. **
Revised March 27, 2002