CYBLE-014008-00 Datasheet, PDF (1/42 Pages) Cypress Semiconductor – EZ-BLE™ PSoC® Module

CYBLE-014008-00
EZ-BLE™ PSoC^® Module
General Description
The Cypress CYBLE-014008-00 is a fully certified and qualified
module supporting Bluetooth^ Low Energy (BLE) wireless
communication. The CYBLE-014008-00 is a turnkey solution
and includes onboard crystal oscillators, trace antenna, passive
components, and the Cypress PSoC^® 4 BLE. Refer to the
PSoC^® 4 BLE datasheet for additional details on the capabilities
of the PSoC 4 BLE device used on this module.
The EZ-BLE PSoC^® module is a scalable and reconfigurable
platform architecture. It combines programmable and
reconfigurable analog and digital blocks with flexible automatic
routing. The CYBLE-014008-00 also includes digital
programmable logic, high-performance analog-to-digital
conversion (ADC), opamps with comparator mode, and standard
communication and timing peripherals.
The CYBLE-014008-00 includes a royalty-free BLE stack
compatible with Bluetooth 4.1 and provides up to 25 GPIOs in a
small 11 × 11 × 1.80 mm package.
The CYBLE-014008-00 is a complete solution and an ideal fit for
applications seeking a highly integrated BLE wireless solution.
Module Description
■ Module size: 11.0 mm × 11.0 mm × 1.80 mm (with shield)
■ 128-KB flash memory, 16-KB SRAM memory
■ Up to 25 GPIOs configurable as open drain high/low,
pull-up/pull-down, HI-Z analog, HI-Z digital, or strong output
■ Bluetooth 4.1 qualified single-mode module
❐ QDID: 79697
❐ Declaration ID: D029647
■ Certified to FCC, CE, MIC, KC, and IC regulations
■ Industrial temperature range: –40 °C to +85 °C
■ 32-bit processor (0.9 DMIPS/MHz) with single-cycle 32-bit
multiply, operating at up to 48 MHz
■ Watchdog timer with dedicated internal low-speed oscillator
(ILO)
■ Two-pin SWD for programming
Power Consumption
■ TX output power: –18 dbm to +3 dbm
■ Received signal strength indicator (RSSI) with 1-dB resolution
■ TX current consumption of 15.6 mA (radio only, 0 dbm)
■ RX current consumption of 16.4 mA (radio only)
■ Low power mode support
❐ Deep Sleep: 1.3 µA with watch crystal oscillator (WCO) on
❐ Hibernate: 150 nA with SRAM retention
❐ Stop: 60 nA with XRES wakeup
Programmable Analog
■ Four opamps with reconfigurable high-drive external and
high-bandwidth internal drive, comparator modes, and ADC
input buffering capability; can operate in Deep-Sleep mode
■ 12-bit, 1-Msps SAR ADC with differential and single-ended
modes; channel sequencer with signal averaging
■ Two current DACs (IDACs) for general-purpose or capacitive
sensing applications on any pin
■ One low-power comparator that operate in Deep-Sleep mode
Programmable Digital
■ Four programmable logic blocks called universal digital blocks,
(UDBs), each with eight macrocells and datapath
■ Cypress-provided peripheral Component library, user-defined
state machines, and Verilog input
Capacitive Sensing
■ Cypress CapSense Sigma-Delta (CSD) provides best-in-class
SNR (> 5:1) and liquid tolerance
■ Cypress-supplied software component makes
capacitive-sensing design easy
■ Automatic hardware-tuning algorithm (SmartSense™)
Segment LCD Drive
■ LCD drive supported on all GPIOs (common or segment)
■ Operates in Deep-Sleep mode with four bits per pin memory
Serial Communication
■ Two independent runtime reconfigurable serial communication
blocks (SCBs) with I²C, SPI, or UART functionality
Timing and Pulse-Width Modulation
■ Four 16-bit timer, counter, pulse-width modulator (TCPWM)
blocks
■ Center-aligned, Edge, and Pseudo-random modes
■ Comparator-based triggering of Kill signals for motor drive and
other high-reliability digital logic applications
Up to 25 Programmable GPIOs
■ Any GPIO pin can be CapSense, LCD, analog, or digital
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-00023 Rev. *F
• San Jose, CA 95134-1709 • 408-943-2600
Revised February 26, 2016