CY8C201A0_09 Datasheet, PDF (1/16 Pages) Cypress Semiconductor – CapSense Express-10 Configurable IOs with Slider

CY8C201A0
CapSense Express™ - 10 Configurable IOs
with Slider
Features
■ 10 configurable IOs supporting
❐ CapSense™ slider
❐ LED drive
❐ Interrupt outputs
❐ WAKE on interrupt input
❐ User defined input or output
■ 2.4V to 2.9V, 3.10V to 3.6V, and 4.75V to 5.25V operating
voltage
■ Industrial temperature range: –40°C to +85°C
■ I²C slave interface for configuration
❐ Selectable to 50 kHz, 100 kHz, and 400 kHz.
■ Reduce BOM cost
❐ Internal oscillator - no external oscillators or crystal
❐ Free development tool - no external tuning components
■ Low operating current
❐ Active current: 1.5 mA
❐ Deep Sleep current: 2.6 uA
■ Available in 16-pin COL and 16-pin SOIC packages
Overview
The CapSense Express™ controller allows the control of 10 IOs
configurable as one capacitive sensing slider (5 or 10
segments)^[1] and the rest as buttons or GPIOs for driving LEDs
or interrupt signals based on various button conditions. The
GPIOs are also configurable for waking up the device from sleep
based on an interrupt input.
The user has the ability to configure slider, buttons, outputs, and
parameters, through specific commands sent to the I²C port. The
IOs have the flexibility of mapping to capacitive buttons and as
standard GPIO functions such as interrupt output or input, LED
drive, and digital mapping of input to output using simple logical
operations. This enables easy PCB trace routing and reduces
the PCB size and stack up. CapSense Express products are
designed for easy integration into complex products.
Architecture
The logic block diagram shows the internal architecture of
CY8C201A0.
The user can configure registers with parameters needed to
adjust the operation and sensitivity of the CapSense system.
CY8C201A0 supports a standard I²C serial communication
interface that allows the host to configure the device and to read
sensor information in real time through easy register access.
The CapSense Express Core
The CapSense Express core has a powerful configuration and
control block. It encompasses SRAM for data storage, an
interrupt controller, and sleep and watchdog timers. System
resources provide additional capability, such as a configurable
I²C slave communication interface and various system resets.
The Analog System contains the CapSense PSoC® block, which
supports capacitive sensing of up to 10 inputs.
Note
1. This part should be selected only if the design requires a slider. This part cannot be configured to work without a slider. For 10 IO requirement use CY8C20110.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-17349 Rev. *F
• San Jose, CA 95134-1709 • 408-943-2600
Revised January 28, 2009
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