CY7C9235_02 Datasheet, PDF (1/8 Pages) Cypress Semiconductor – SMPTE-259M/DVB-ASI Scrambler/Controller

PRELIMINARY
CY7C9235
1CY7C9235
Features
• Fully compatible with SMPTE-259M
— SMPTE-125M compliant for 4:2:2 component video
— SMPTE-244M compliant for 4fsc composite video
• Fully compatible with DVB-ASI
• Operates from a single +5V or –5V supply
• 44-pin PLCC package
• Encodes both 8- and 10-bit parallel digital streams for
any rate from 16–40 M characters/sec (160–400
Mbits/sec serial)
• Operates with CY7B9234 SMPTE HOTLink™ serializ-
er/transmitter
• X⁹ + X⁴ + 1 scrambler and NRZI encoder may be by-
passed for raw data output
Functional Description
SMPTE-259M Operation
The CY7C9235 is a CMOS integrated circuit designed to en-
code SMPTE-125M and SMPTE-244M bit-parallel digital char-
acters (or other data formats) using the SMPTE-259M encod-
ing rules. Following encoding, the characters are output as
bit-parallel characters ready for serialization. The encoded
outputs of the CY7C9235 are designed to be directly mated to
Logic Block Diagram
SMPTE-259M/DVB-ASI
Scrambler/Controller
a CY7B9234 HOTLink transmitter, which then converts the
bit-parallel characters into a SMPTE-259M compatible
high-speed serial data stream.
This device performs both TRS (sync) detection and filtering,
data scrambling with the SMPTE-259M X⁹ + X⁴ + 1 algorithm,
and NRZ-to-NRZI encoding. These functions operate at any
character rate from 16- to 40 MHz. For those systems operat-
ing with non-SMPTE-259M compliant video streams (or for di-
agnostic purposes), the scrambler and NRZI encoding func-
tions can be disabled.
DVB-ASI Operation
The CY7C9235 also contains the necessary multiplexers, con-
trol inputs, and outputs, to sequence out a DVB-ASI compliant
video stream. DVB-ASI operation is enabled through activa-
tion of a single input signal. This allows a single serial output
port to support both SMPTE and DVB data streams under soft-
ware or hardware control.
In DVB-ASI mode the CY7C9235 operates with two enable
signals (ENA and ENN) to allow data to be presented from
either synchronous (clocked) or asynchronous FIFOs. When
data is not available, the CY7C9235 ensures that the proper
fill character (K28.5) is generated by the attached CY7B9234
serializer.
The CY7C9235 operates from a single +5V or −5V supply. It
is available in a 44-pin PLCC space saving package.
PD₉(SVS)
PD₈
PD₇
PD₆
PD₅
PD₄
PD₃
PD₂
PD₁
PD₀(SC/D)
TRS_FILT
SC/D_EN
SVS_EN
BYPASS
DVB_EN
ENA
ENN
CKW
OE
10
10
10
10
10
TRS_DET
Q₉(SVS)
Q₈
Q₇
Q₆
Q₅
Q₄
Q₃
Q₂
Q₁
Q₀(SC/D)
ENA_OUT
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-02012 Rev. *A
Revised December 27, 2002