CY7C68003_13 Datasheet, PDF (1/30 Pages) Cypress Semiconductor – MoBL-USB™ TX2UL USB 2.0 ULPI Transceiver

CY7C68003
MoBL-USB™ TX2UL USB 2.0
ULPI Transceiver
Features
The Cypress MoBL-USB™ TX2UL is a low voltage high speed
(HS) USB 2.0 UTMI+ Low Pin Interface (ULPI) Transceiver. The
TX2UL is specifically designed for mobile handset applications
by offering tiny package options and low power consumption.
■ USB 2.0 Full Speed and High Speed compliant transceiver
■ Multi range (1.8 V to 3.3 V) I/O voltages
■ Fully compliant ULPI link interface
■ 8-bit SDR ULPI data path
■ UTMI+ level 0 support
■ Support USB device mode only
■ Integrated oscillator
■ Integrated phase locked loop (PLL) – 13, 19.2, 24, or 26 MHz
reference
■ Integrated USB pull-up and termination resistors
■ 3.0 V to 5.775 V VBATT input
■ Chip select pin
■ Single ended device RESET input
■ UART pass through mode
■ ESD compliance:
❐ JESD22-A114D 8 kV Contact human body model (HBM) for
DP, DM, and V_SS pins
❐ IEC61000 - 4-2 8 kV contact discharge
❐ IEC61000 - 4-2 15 kV air discharge
■ Support for industrial temperature range: (-40 C to 85 C)
■ Low power consumption for mobile applications:
❐ 5 µA nominal sleep mode
❐ 30 mA nominal active HS transfer
■ Small package for mobile applications:
❐ 2.14 x 1.76 mm 20-pin WLCSP 0.4 mm pitch
❐ 4 x 4 mm 24-pin QFN
Applications
■ Mobile phones
■ PDAs
■ Portable media players (PMPs)
■ DTV applications
■ Portable GPS units
TX2UL Block Diagram
CLOCK
DATA[7:0]
DIR
STP
NXT
TX2UL
ULPI Block
I/O
Control/
Data
Logic
Operational
mode
tracking
interrupt
Registers
Block
ULPI Wrapper
Tx/Rx
Core
UTMI+
Level0
DP
USB
FS/HS
PHY
DM
RESET_N
CS_N
(3.0 –
5.775 V)
VBATT
VCC
(1.8 V)
13/19.2/
XI
24/26 MHz
XO
Global Control Block
Reset / Clock / Power /
Misc. Control
POR
XOSC
PLL
RXD
TXD
3.3 V
Regulator
Block
1.8 V
Bandgap
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-15775 Rev. *L
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 22, 2013