CY7C68000 Datasheet, PDF (1/14 Pages) Cypress Semiconductor – TX2 USB 2.0 UTMI Transceiver

PRELIMINARY
CY7C68000
TX2™ USB 2.0 UTMI Transceiver
1.0 EZ-USB TX2 Features
• Synchronous field and EOP detection on receive pack-
The Cypress EZ-USB TX2 is a Universal Serial Bus (USB)
specification revision 2.0 transceiver, serial/deserializer, to a
parallel interface of either 16 bits at 30 MHz or eight bits at 60
MHz. The TX2 provides a high-speed physical layer interface
ets
• Synchronous field and EOP generation on transmit
packets
• Data and clock recovery from the USB serial stream
that operates at the maximum allowable USB 2.0 bandwidth. • Bit stuffing/unstuffing; bit stuff error detection
This allows the system designer to keep the complex high-
speed analog USB components external to the digital ASIC
which decreases development time and associated risk. A
standard interface is provided that is USB 2.0-certified and is
compliant with Transceiver Macrocell Interface (UTMI) speci-
fication version 1.05 dated 3/29/01.
• Staging register to manage data rate variation due to
bit stuffing/unstuffing
• 16-bit 30-MHz, and 8-bit 60-MHz parallel interface
• Ability to switch between FS and HS terminations and
signaling
Two packages are defined for the family: 56-pin SSOP and 56-
pin QFN.
The function block diagram is shown in Figure 1-1.
• UTMI-compliant/USB-2.0-certified for device operation
• Operates in both USB 2.0 high speed (HS), 480
Mbits/second, and full speed (FS), 12 Mbits/second
• Supports detection of USB reset, suspend, and resume
• Supports HS identification and detection as defined by
the USB 2.0 Specification
• Supports transmission of resume signaling
• 3.3V operation
• Two package options—56-pin QFN, and 56-pin SSOP
• Serial-to-parallel and parallel-to-serial conversions
• All required terminations, including 1.5K-ohm pull-up
• 8-bit unidirectional, 8-bit bidirectional, or 16-bit bidirec-
on DPLUS, are internal to chip
tional external data interface
• Supports USB 2.0 test modes.
CY7C68000
CY7C68000
XTALIN/
OUT
OSC
20X
PLL
PLL_480
UTMI CLK
UTMI CLK
Full-Speed Rx
High-Speed Rx _Traffic
USB
Sync
USB
2.0
XCVR High-Speed Tx
Full-Speed Tx
Elasticity
Buffer
Fast
Digital
Rx
Fast
Digital
Tx
Digital
Rx
Digital
Tx
UTMI Rx Ctl
UTMI Rx Data 8/16
BIDI Option
Also
UTMI Rx Data 8/16
UTMI Tx Ctl
Figure 1-1. Block Diagram
Cypress Semiconductor Corporation
Document #: 38-08016 Rev. *E
• 3901 North First Street
• San Jose, CA 95134 • 408-943-2600
Revised November 2, 2004