CY7C65642_1107 Datasheet, PDF (1/21 Pages) Cypress Semiconductor – HX2VL – Very Low Power USB 2.0 TetraHub Controller

CY7C65642
HX2VL – Very Low Power USB 2.0
TetraHub™ Controller
Features
■ High-performance, low-power USB 2.0 hub, optimized for
low- cost designs with minimum bill-of-material (BOM).
■ USB 2.0 hub controller
❐ Compliant with USB2.0 specification
❐ Up to four downstream ports support
❐ Downstream ports are backward compatible with FS, LS
❐ Multiple translator (TT), one per downstream port for
maximum performance.
■ Very low-power consumption
❐ Supports bus-powered and self-powered modes
❐ Auto switching between bus-powered and self-powered
❐ Single MCU with 2 K ROM and 64 byte RAM
❐ Lowest power consumption.
■ Highly integrated solution for reduced BOM cost
❐ Internal regulator - single power supply 5 V required.
❐ Provision of connecting 3.3 V with external regulator.
❐ Integrated upstream pull-up resistor
❐ Integrated pull-down resistors for all downstream ports
❐ Integrated upstream/downstream termination resistors
❐ Integrated port status indicator control
Block Diagram
❐ 12-MHz +/-500 ppm external crystal with drive level 600 W
(integrated PLL) clock input with optional 27/48-MHz
oscillator clock input.
❐ Internal power failure detection for ESD recovery
■ Downstream port management
❐ Support individual and ganged mode power management
❐ Overcurrent detection within 8 mS.
❐ Two status indicators per downstream port
❐ Slew rate control for EMI management
■ Maximum configurability
❐ VID and PID are configurable through external EEPROM
❐ Number of ports, removable/non-removable ports are
configurable through EEPROM and I/O pin configuration
❐ I/O pins can configure gang/individual mode power
switching, reference clock source and polarity of power
switch enable pin
❐ Configuration options also available through mask ROM
■ Available in space saving 48-pin (7 × 7 mm) TQFP and
28-pin (5 × 5 mm) QFN packages
■ Supports 0 C to +70 C temperature range
12/27/48
MHz
OSC-in
OR 12
MHz
Crystal
D+
D-
USB 2.0 PHY
PLL
USB Upstream Port
Hub Repeater
Serial
Interface
Engine
HS USB
Control Logic
MCU
RAM ROM
Transaction Translator x 4
Routing Logic
1.8 V _Regulator
3.3 V
I2C /
SPI
5 V i/p (for internal
regulator)
NC (for external regulator)
3.3 V i/p (with ext. reg. & 28-QFN
NC (with ext. reg. & 48-TQFP)
3.3 V o/p (for int. reg.)
USB Downstream Port 1
USB 2.0
PHY
Port
Control
USB Downstream Port 2
USB 2.0
PHY
Port
Control
USB Downstream Port 3
USB 2.0
PHY
Port
Control
USB Downstream Port 4
USB 2.0
PHY
Port
Control
D+ D-
LED
D+ D-
LED
D+ D-
LED
D+ D-
LED
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-65659 Rev. *B
• San Jose, CA 95134-1709 • 408-943-2600
Revised July 27, 2011