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CY7C65642 Datasheet, PDF (1/21 Pages) Cypress Semiconductor – HX2VL – Very Low Power USB 2.0 TetraHub Controller | |||
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PRELIMINARY
CY7C65642
HX2VL â Very Low Power USB 2.0
TetraHub⢠Controller
Features
â High-performance, low-power USB 2.0 hub, optimized for low-
cost designs with minimum bill-of-material (BOM).
â USB 2.0 hub controller
â Compliant with USB2.0 specification
â Up to four downstream ports support
â Downstream ports are backward compatible with FS, LS
â Multiple translator (TT), one per downstream port for
maximum performance.
â Very low-power consumption
â Supports bus-powered and self-powered modes
â Auto switching between bus-powered and self-powered
â Single MCU with 2 K ROM and 64 byte RAM
â Lowest power consumption.
â Highly integrated solution for reduced BOM cost
â Internal regulator - single power supply 5 V required.
â Provision of connecting 3.3 V with external regulator.
â Integrated upstream pull-up resistor
â Integrated pull-down resistors for all downstream ports
â Integrated upstream/downstream termination resistors
Block Diagram
â Integrated port status indicator control
â 12-MHz +/-500 ppm external crystal with drive level 600 μW
(integrated PLL) clock input with optional 27/48-MHz
oscillator clock input.
â Internal power failure detection for ESD recovery
â Downstream port management
â Support individual and ganged mode power management
â Overcurrent detection within 8 mS.
â Two status indicators per downstream port
â Slew rate control for EMI management
â Maximum configurability
â VID and PID are configurable through external EEPROM
â Number of ports, removable/non-removable ports are
configurable through EEPROM and I/O pin configuration
â I/O pins can configure gang/individual mode power
switching, reference clock source and polarity of power
switch enable pin
â Configuration options also available through mask ROM
â Available in space saving 48-pin (7 Ã 7 mm) TQFP and 28-pin
(5 Ã 5 mm) QFN packages
â Supports 0 °C to +70 °C temperature range
12/27/48
MHz
OSC-in
OR 12
MHz
Crystal
D+
D-
USB 2.0 PHY
PLL
USB Upstream Port
Hub Repeater
Serial
Interface
Engine
HS USB
Control Logic
MCU
RAM ROM
Transaction Translator x 4
Routing Logic
1.8 V Regulator
3.3 V
I2C /
SPI
5 V i/p (for internal
regulator)
NC (for external regulator)
3.3 V i/p (with ext. reg. & 28-QFN
NC (with ext. reg. & 48-TQFP)
3.3 V o/p (for int. reg.)
USB Downstream Port 1
USB 2.0
PHY
Port
Control
USB Downstream Port 2
USB 2.0
PHY
Port
Control
USB Downstream Port 3
USB 2.0
PHY
Port
Control
USB Downstream Port 4
USB 2.0
PHY
Port
Control
D+ D-
LED
D+ D-
LED
D+ D-
LED
D+ D-
LED
Cypress Semiconductor Corporation ⢠198 Champion Court
Document Number: 001-65659 Rev. *A
⢠San Jose, CA 95134-1709 ⢠408-943-2600
Revised June 29, 2011
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