CY7C6435X Datasheet, PDF (1/26 Pages) Cypress Semiconductor – enCoRe™ V Full-Speed USB Controller

PRELIMINARY
CY7C6435x
CY7C64345, CY7C6431x
enCoRe™ V Full-Speed USB Controller
Features
■ Powerful Harvard Architecture Processor
❐ M8C Processor speeds running up to 24 MHz
❐ Low power at high processing speeds
❐ Interrupt controller
❐ 3.0V to 5.5V Operating voltage
❐ Temperature range: 0°C to 70°C
■ Flexible On-Chip Memory
❐ Up to 32K Flash program storage
50,000 Erase/write cycles
❐ Up to 2048 bytes SRAM data storage
❐ Flexible protection modes
❐ In-System Serial Programming (ISSP)
■ Complete Development Tools
❐ Free development tool (PSoC Designer™)
❐ Full-featured, in-circuit emulator and programmer
❐ Full-speed emulation
❐ Complex breakpoint structure
❐ 128K Trace memory
■ Precision, Programmable Clocking
❐ Crystal-less oscillator with support for an external crystal or
resonator
❐ Internal ±5.0% 6/12/24 MHz main oscillator
❐ Internal low-speed oscillator at 32 kHz for watchdog and
sleep. The frequency range is 19-50 kHz with a 32 kHz typical
value.
❐ 0.25% Accuracy for USB with no external components
■ Programmable Pin Configurations
❐ 25 mA Sink current on all GPIO
❐ Pull up, high Z, open drain, CMOS drive modes on all GPIO
❐ Configurable inputs on all GPIO
❐ Low dropout voltage regulator for Port1 pins. Programmable
to output 3.0, 2.5, or 1.8V at the IO pins.
❐ Selectable, regulated digital IO on Port 1
• Configurable Input Threshold for Port 1
• 3.0V, 20 mA Total Port 1 Source Current
• Hot-Swappable
❐ 5 mA Strong drive mode on Ports 0 and 1
■ Full-Speed USB (12 Mbps)
❐ Eight unidirectional endpoints
❐ One bidirectional control endpoint
❐ USB 2.0 compliant
❐ Dedicated 512 bytes buffer
❐ No external crystal required
■ Additional System Resources
❐ Configurable communication speeds
❐ I²C™ slave
• Selectable to 50 kHz, 100 kHz, or 400 kHz
• Implementation requires no clock stretching
• Implementation during sleep modes with less than 100 μA
• Hardware address detection
❐ SPI master and SPI slave
• Configurable between 46.9 kHz - 3 MHz
❐ Three 16-bit timers
❐ 10-bit ADC to use for monitoring battery voltage or other sig-
nals
❐ Watchdog and sleep timers
❐ Integrated supervisory circuit
enCoRe V
Block Diagram
enCoRe V
CORE
Port 4 Port 3 Port 2 Port 1 Port 0 Prog. LDO
SRAM
2048 Bytes
Interrupt
Controller
SROM Flash 32K
CPU Core
(M8C)
System Bus
Sleep and
Watchdog
6/12/24 MHz Internal Main Oscillator
3 16-Bit
Timers
I2C Slave/SPI
Master-Slave
POR and LVD
System Resets
SYSTEM RESOURCES
Full
Speed
USB
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-12394 Rev. *D
• San Jose, CA 95134-1709 • 408-943-2600
Revised October 17, 2007
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