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CY7C6431X_11 Datasheet, PDF (1/37 Pages) Cypress Semiconductor – enCoRe V Full Speed USB Controller | |||
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CY7C6431x
CY7C6434x, CY7C6435x
enCoRe⢠V Full Speed USB Controller
Features
â Powerful Harvard-architecture processor
â M8C processor speeds running up to 24 MHz
â Low power at high processing speeds
â Interrupt controller
â 3.0 V to 5.5 V operating voltage without USB
â Operating voltage with USB enabled:
⢠3.15 V to 3.45 V when supply voltage is around 3.3 V
⢠4.35 V to 5.25 V when supply voltage is around 5.0 V
â Commercial temperature range: 0 °C to +70 °C
â Industrial temperature range: â40 °C to +85 °C
â Flexible on-chip memory
â Up to 32 KB flash program storage:
⢠50,000 erase and write cycles
⢠Flexible protection modes
â Up to 2048 bytes SRAM data storage
â In-system serial programming (ISSP)
â Complete development tools
â Free development tool PSoC Designerâ¢
â Full-featured, in-circuit emulator and programmer
â Full-speed emulation
â Complex breakpoint structure
â 128-KB trace memory
â Precision, programmable clocking
â Crystal-less oscillator with support for an external crystal or
resonator
â Internal ±5.0% 6, 12, or 24 MHz main oscillator (IMO):
⢠0.25% accuracy with oscillator lock to USB data, no
external components required
⢠Internal low-speed oscillator (ILO) at 32 kHz for watchdog
and sleep. The frequency range is 19 to 50 kHz with a
32-kHz typical value
â Programmable pin configurations
â Up to 36 general purpose I/O (GPIO) depending on package.
â 25 mA sink current on all GPIO
⢠60mA total sink current on Even port pins and 60mA total
sink current on Odd port pins
⢠120 mA total sink current on all GPIOs
â Pull-up, High Z, open drain, CMOS drive modes on all GPIO
â CMOS drive mode A -5 mA source current on ports 0 and 1
and 1 mA on ports 2, 3, and 4
⢠20 mA total source current on all GPIOs
â Low dropout voltage regulator for Port 1 pins:
⢠Programmable to output 3.0, 2.5, or 1.8 V
â Selectable, regulated digital I/O on Port 1
â Configurable input threshold for Port 1
â Hot-swappable Capability on Port 1
â Full-Speed USB (12 Mbps)
â Eight unidirectional endpoints
â One bidirectional control endpoint
â USB 2.0-compliant: TID# 40000893
â Dedicated 512 bytes buffer
â No external crystal required
â Additional system resources
â Configurable communication speeds
â I2C slave:
⢠Selectable to 50 kHz, 100 kHz, or 400 kHz
⢠Implementation requires no clock stretching
⢠Implementation during sleep modes with less than 100 ïA
⢠Hardware address detection
â SPI master and SPI slave:
⢠Configurable between 46.9 kHz and 12 MHz
â Three 16-bit timers
â 10-bit ADC used to monitor battery voltage or other signals
with external components
â Watchdog and sleep timers
â Integrated supervisory circuit
enCoRe V Block Diagram
enCoRe V
CORE
SRAM
2048 Bytes
Interrupt
Controller
Port 4 Port 3 Port 2 Port 1 Port 0 Prog. LDO
SROM
8K/16K/32K Flash
CPU Core (M8C)
6/12/24 MHz Internal Main Oscillator
System Bus
Sleep and
Watchdog
ADC
3 16-Bit
Timers
I2C Slave/SPI
Master-Slave
POR and LVD
System Resets
SYSTEM RESOURCES
Full
Speed
USB
Cypress Semiconductor Corporation ⢠198 Champion Court
Document Number: 001-12394 Rev. *M
⢠San Jose, CA 95134-1709 ⢠408-943-2600
Revised October 06, 2010
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