CY7C637XX Datasheet, PDF (1/3 Pages) Cypress Semiconductor – enCoRe™ USB Combination Low-speed USB

CY7C637xx
Errata Revision: **
March 30, 2004
Errata Document for CY7C637xx / enCoRe™ USB Combination Low-speed USB & PS/2
Peripheral Controller
This document describes the errata for the enCoRe™ USB Combination Low-speed USB & PS/2 Periheral Control-
ler / CY7C637xx. Details include errata trigger conditions, available workarounds, and silicon revision applicability.
This document should be used to compare to the datasheet for this device to fully describe the device functionality.
Please contact your local Cypress Sales Representative if you have further questions.
Part Numbers Affected
Part Number
CY7C63722
CY7C63723
CY7C63743
Device Characteristics
All packages
All packages
All packages
enCoRe™ USB Combination Low-speed USB & PS/2 Peripheral Controller Qualification Status
Product status: In Production - Qual report: 001406
enCoRe™ USB Combination Low-speed USB & PS/2 Peripheral Controller Errata Summary
The following table defines the errata applicability to available enCoRe™ USB Combination Low-speed USB & PS/2
Peripheral Controller family devices. An "X" indicates that the errata pertains to the selected device.
Note: Errata titles are hyperlinked. Click on table entry to jump to description.
Items
1. Faulty GPIO Interrupt
CY7C637xx
X
Rev Letter
A
Fix Status
No silicon fix planned.
1. Faulty GPIO Interrupt
• PROBLEM DEFINITION
When a falling edge interrupt is enabled for a GPIO pin, reading the GPIO Port 1 coincident to a rising edge
of that GPIO signal may generate a false GPIO interrupt.
Any Port 0 or Port 1 GPIO
pin with Falling Edge GPIO
Interrupt Enabled
Port 1 Read Signal
(See Note 1)
GPIO Interrupt Signal
(See Note 2)
Proper GPIO
Interrupt Trigger
False GPIO interrupt
on a Rising edge
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
March 2004