CY7C344_95 Datasheet, PDF (1/17 Pages) Cypress Semiconductor – 32-Macrocell MAX® EPLD

1CY 7C34 4B
fax id: 6101
CY7C344
CY7C344B
32-Macrocell MAX® EPLD
Features
• High-performance, high-density replacement for TTL,
74HC, and custom logic
• 32 macrocells, 64 expander product terms in one LAB
• 8 dedicated inputs, 16 I/O pins
• 0.8-micron double-metal CMOS EPROM technology
(CY7C344)
• Advanced 0.65-micron CMOS EPROM technology to
increase performance (CY7C344B)
• 28-pin 300-mil DIP, cerDIP or 28-pin HLCC, PLCC
package
Functional Description
Available in a 28-pin 300-mil DIP or windowed J-leaded ce-
ramic chip carrier (HLCC), the CY7C344/CY7C344B repre-
sents the densest EPLD of this size. Eight dedicated inputs
and 16 bidirectional I/O pins communicate to one logic array
block. In the CY7C344 LAB there are 32 macrocells and 64
expander product terms. When an I/O macrocell is used as an
input, two expanders are used to create an input path. Even if
all of the I/O pins are driven by macrocell registers, there are
still 16 “buried” registers available. All inputs, macrocells, and
I/O pins are interconnected within the LAB.
The speed and density of the CY7C344/CY7C344B makes it
a natural for all types of applications. With just this one device,
the designer can implement complex state machines, regis-
tered logic, and combinatorial “glue” logic, without using mul-
tiple chips. This architectural flexibility allows the
CY7C344/CY7C344B to replace multichip TTL solutions,
whether they are synchronous, asynchronous, combinatorial,
or all three.
Logic Block Diagram^[1]
15(22)
15(23)
27(6)
28(7)
INPUT
INPUT
INPUT
INPUT
INPUT
1(8)
INPUT/CLK 2(9)
INPUT
13(20)
INPUT
14(21)
Pin Configurations
HLCC
Top View
4 3 2 1 28 27 26
MACROCELL 2
MACROCELL 1
MACROCELL 4
MACROCELL 3
MACROCELL 6
G
MACROCELL 5
I
MACROCELL 8
L
MACROCELL 7
O
O
MACROCELL 10
MACROCELL 9
MACROCELL 12
B
MACROCELL 11
C
MACROCELL 14
MACROCELL 16
A
L
MACROCELL 13
O
MACROCELL 15
N
MACROCELL 18
B
MACROCELL 20
U
MACROCELL 22
S
MACROCELL 24
MACROCELL 17
T
MACROCELL 19
R
MACROCELL 21
O
L
MACROCELL 23
MACROCELL 26
MACROCELL 25
MACROCELL 28
MACROCELL 27
MACROCELL 30
MACROCELL 29
MACROCELL 32
MACROCELL 31
64 EXPANDER PRODUCT TERM ARRAY
32
I/O 3(10)
I/O 4(11)
I/O 5(12)
I/O 6(13)
I/O 9(16)
I/O 10(17)
I/O 11(18)
I/O 12(19)
I/O 17(24)
I/O 18(25)
I/O 19(26)
I/O 20(27)
I/O 23(2)
I/O 24(3)
I/O 25(4)
I/O 26(5)
C344–1
I/O
INPUT
INPUT
INPUT
INPUT/CLK
I/O
I/O
5
25
6
24
7
23
8
22
9
21
10
20
11
12
13
14 1516
1718 ¹⁹
I/O
I/O
INPUT
INPUT
INPUT
INPUT
I/O
C344–2
INPUT
INPUT/CLK
I/O
I/O
I/O
I/O
V_CC
GND
I/O
I/O
I/O
I/O
INPUT
INPUT
CerDIP
Top View
1
28 INPUT
2
27 INPUT
3
26 ^I/O
4
25 I/O
5
24 ^I/O
6
23 I/O
7
22 ^VCC
8
21 GND
9
20 ^I/O
10
19 I/O
11
18 I/O
12
17 I/O
13
16 ^INPUT
14
15 INPUT
C344–3
Selection Guide
7C344B–10
7C344B–12
7C344–15
7C344B–15
7C344–20
7C344B–20
7C344–25
7C344B–25
Maximum Access Time (ns)
10
12
15
20
25
Maximum
Commercial
200
200
200
200
200
Operating
Current (mA)
Military
Industrial
220
220
220
220
220
220
220
Maximum Standby Commercial
150
150
150
150
150
Current (mA)
Military
170
170
170
Industrial
170
170
170
170
Shaded area contains preliminary information.
Note:
1. Numbers in () refer to J-leaded packages.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
January 1990 – Revised October 1995