CY7C235A_95 Datasheet, PDF (1/9 Pages) Cypress Semiconductor – 1K x 8 Registered PROM

1CY 7C23 5A
CY7C235A
1K x 8 Registered PROM
Features
• CMOS for optimum speed/power
• High speed
— 18 ns address set-up
— 12 ns clock to output
• Low power
— 495 mW (commercial)
— 660 mW (military)
• Synchronous and asynchronous output enables
• On-chip edge-triggered registers
• Programmable asynchronous registers (INIT)
• EPROM technology, 100% programmable
• Slim, 300-mil, 24-pin plastic or hermetic DIP or 28-pin
LCC and PLCC
• 5V ±10% V_CC, commercial and military
• TTL-compatible I/O
• Direct replacement for bipolar PROMs
• Capable of withstanding greater than 2001V static dis-
charge
Functional Description
The CY7C235A is a high-performance 1024 word by 8 bit elec-
trically programmable read only memory packaged in a slim
300-mil plastic or hermetic DIP, 28-pin leadless chip carrier, or
28-pin plastic leaded chip carrier. The memory cells utilize
proven EPROM floating gate technology and byte-wide intelli-
gent programming algorithms.
The CY7C235A replaces bipolar devices pin for pin and offers
the advantages of lower power, superior performance, and
high programming yield. The EPROM cell requires only 12.5V
for the supervoltage, and low current requirements allow for
gang programming. The EPROM cells allow for each memory
location to be tested 100%, as each location is written into,
erased, and repeatedly exercised prior to encapsulation. Each
PROM is also tested for AC performance to guarantee that the
product will meet AC specification limits after customer pro-
gramming.
Logic Block Diagram
INIT
A₉
A₈
A7
ROW
ADDRESS
PROGRAMMABLE
ARRAY
MULTIPLEXER
A6
A5
ADDRESS
DECODER
A₄
A₃
A₂
COLUMN
A₁
ADDRESS
A₀
CP
E_S
E
O₇
O₆
O₅
8-BIT
EDGE-
TRIGGERED
O₄
REGISTER
O₃
O2
O₁
CP
O₀
C235A-1
Pin Configuration
DIP
Top View
A7 ¹
A₆ 2
A5 ³
A4 4
A3 5
A2 6
A1 7
A0 8
O0 9
O1 10
O2 11
GND 12
24 V_CC
23 A₈
22 _A9
21 _E
20 INIT
19 ES
18 CP
17 O7
16 O6
15 O5
14 O4
13 O₃
C235A-2
LCC/PLCC
Top View
4 3 2 1 282726
A₄ 5
25 ^E
A_{3 6}
24 INIT
A_{2 7}
23 ES
A1 ₈
22 CP
A_{0 9}
21 NC
NC ₁₀
20 O7
O₀
11
12
19
131415161718
O₆
C235A-3
Selection Guide
Minimum Address Set-Up Time (ns)
Maximum Clock to Output (ns)
Maximum Operating
Current (mA)
Commercial
Military
7C235A-18
18
12
90
7C235A-25
25
12
90
120
7C235A-30
30
15
90
120
7C235A-40
40
20
90
120
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
November 1992 – Revised March 1995