CY7C199D-10VXIT Datasheet, PDF (1/14 Pages) Cypress Semiconductor – 256 K (32 K × 8) Static RAM

CY7C199D
256 K (32 K × 8) Static RAM
256 K (32 K × 8) Static RAM
Features
■ Temperature ranges
❐ –40 °C to 85 °C
■ Pin and function compatible with CY7C199C
■ High speed
❐ t_AA = 10 ns
■ Low active power
❐ I_CC = 80 mA at 10 ns
■ Low CMOS standby power
❐ I_SB2 = 3 mA
■ 2.0 V data retention
■ Automatic power-down when deselected
■ Complementary metal oxide semiconductor (CMOS) for
optimum speed/power
■ Transistor-transistor logic (TTL) compatible inputs and outputs
■ Easy memory expansion with CE and OE features
■ Available in Pb-free 28-pin 300-Mil-wide molded small outline
J-lead package (SOJ) and 28-pin thin small outline package
(TSOP) I packages
Logic Block Diagram
Functional Description
The CY7C199D is a high performance CMOS static RAM
organized as 32,768 words by 8-bits. Easy memory expansion is
provided by an active LOW chip enable (CE), an active LOW
output enable (OE) and tri-state drivers. This device has an
automatic power-down feature, reducing the power consumption
when deselected. The input and output pins (I/O₀ through I/O₇)
are placed in a high impedance state when the device is
deselected (CE HIGH), the outputs are disabled (OE HIGH), or
during a write operation (CE LOW and WE LOW).
Write to the device by taking chip enable (CE) and write enable
(WE) inputs LOW. Data on the eight I/O pins (I/O₀ through I/O₇)
is then written into the location specified on the address pins (A₀
through A₁₄).
Read from the device by taking chip enable (CE) and output
enable (OE) LOW while forcing write enable (WE) HIGH. Under
these conditions, the contents of the memory location specified
by the address pins appears on the I/O pins.
I/O₀
I/O₁
I/O₂
I/O₃
I/O₄
I/O₅
I/O₆
I/O₇
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-05471 Rev. *I
• San Jose, CA 95134-1709 • 408-943-2600
Revised June 2, 2011
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