CY7C199CN_11 Datasheet, PDF (1/18 Pages) Cypress Semiconductor – 256 K (32 K x 8) Static RAM 2.0 V data retention

CY7C199CN
256 K (32 K × 8) Static RAM
Features
■ Fast access time: 15 ns and 20 ns
■ Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)
■ CMOS for optimum speed and power
■ TTL-compatible inputs and outputs
■ 2.0 V data retention
■ Low CMOS standby power
■ Automated power down when deselected
■ Available in Pb-free 28-pin TSOP I, 28-pin Molded SOJ and
28-pin DIP packages
General Description ^[1]
The CY7C199CN is a high performance CMOS Asynchronous
SRAM organized as 32K by 8 bits that supports an asynchronous
memory interface. The device features an automatic power
down feature that reduces power consumption when deselected.
See the “Truth Table” on page 4 in this data sheet for a complete
description of read and write modes.
The CY7C199CN is available in Pb-free 28-pin TSOP I, 28-pin
Molded SOJ and 28-pin DIP package(s).
Logic Block Diagram
Input Buffer
RAM Array
Column Decoder
Power
Down
Circuit
X
I/Ox
CE
WE
OE
A
X
Product Portfolio
–15
Maximum Access Time
15
Maximum Operating Current
80
Maximum CMOS Standby Current (low power)
500
–20
Unit
20
ns
75
mA
500
μA
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-06435 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 17, 2011
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