CY7C199CN Datasheet, PDF (1/14 Pages) Cypress Semiconductor – 256K (32K x 8) Static RAM

CY7C199CN
256K (32K x 8) Static RAM
Features
• Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns
• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)
• CMOS for optimum speed and power
• TTL-compatible inputs and outputs
• 2.0V data retention
• Low CMOS standby power
• Automated power down when deselected
• Available in Pb-free 28-pin TSOP I, 28-pin Molded SOJ and
28-pin DIP packages
General Description ^[1]
The CY7C199CN is a high performance CMOS Asynchronous
SRAM organized as 32K by 8 bits that supports an
asynchronous memory interface. The device features an
automatic power down feature that reduces power
consumption when deselected.
See the “Truth Table” on page 3 in this data sheet for a
complete description of read and write modes.
The CY7C199CN is available in Pb-free 28-pin TSOP I, 28-pin
Molded SOJ and 28-pin DIP package(s).
Logic Block Diagram
Input Buffer
RAM Array
Column Decoder
Power
Down
Circuit
X
I/Ox
CE
WE
OE
A
X
Product Portfolio
–12
–15
–20
–25
Unit
Maximum Access Time
12
15
20
25
ns
Maximum Operating Current
85
80
75
75
mA
Maximum CMOS Standby Current
500
500
500
500
µA
(low power)
Note
1. For best practices recommendations, refer to the Cypress application note System Design Guidelines on www.cypress.com.
Cypress Semiconductor Corporation
Document #: 001-06435 Rev. *B
• 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Revised March 08, 2007
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