CY7C197BN Datasheet, PDF (1/9 Pages) Cypress Semiconductor – 256 Kb (256K x 1) Static RAM

Features
• Fast access time: 12 ns
• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)
• CMOS for optimum speed and power
• TTL compatible inputs and outputs
• Available in 24-lead DIP and 24-lead SOJ
Logic Block Diagram
Input
Buffer
CY7C197BN
256 Kb (256K x 1) Static RAM
General Description ^[1]
The CY7C197BN is a high performance CMOS Asynchronous
SRAM organized as 256K × 1 bits that supports an
asynchronous memory interface. The device features an
automatic power down feature that significantly reduces power
consumption when deselected.
See the “Truth Table” on page 7 for a complete description of
Read and Write modes.
The CY7C197BN is available in 24-lead DIP and 24-lead SOJ
package(s).
Din
RAM Array
Dout
Column
Decoder
Power
Down
Circuit
CE
WE
x _Ax
Product Portfolio
-12
Maximum Access Time
12
Maximum Operating Current
150
Maximum CMOS Standby Current
10
-15
-25
Unit
15
25
ns
150
95
mA
10
10
mA
Notes
1. For best practice recommendations, refer to the Cypress application note System Design Guidelines on www.cypress.com.
Cypress Semiconductor Corporation
Document #: 001-06447 Rev. **
• 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Revised March 21, 2007
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