CY7C168A Datasheet, PDF (1/9 Pages) Cypress Semiconductor – 4Kx4 RAM

CY7C168A
Features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• High speed
— t_AA = 15 ns
• Low active power
— 633 mW
• Low standby power
— 110 mW
• TTL-compatible inputs and outputs
• V_IH of 2.2V
• Capable of withstanding greater than 2001V electrostat-
ic discharge
4Kx4 RAM
Functional Description
The CY7C168A is a high-performance CMOS static RAM or-
ganized as 4096 by 4 bits. Easy memory expansion is provided
by an active LOW Chip Enable (CE) and three-state drivers.
The CY7C168A has an automatic power-down feature, reduc-
ing the power consumption by 77% when deselected.
Writing to the device is accomplished when the Chip Select
(CE) and Write Enable (WE) inputs are both LOW. Data on the
four data input/output pins (I/O₀ through I/O₃) is written into the
memory location specified on the address pins (A₀ through
A₁₁).
Reading the device is accomplished by taking the Chip Enable
(CE) LOW, while Write Enable (WE) remains HIGH. Under
these conditions, the contents of the location specified on the
address pins will appear on the four data input/output pins
(I/O₀ through I/O₃).
The input/output pins remain in a high-impedance state when
Chip Enable (CE) is HIGH or Write Enable (WE) is LOW.
A die coat is used to insure alpha immunity.
Logic Block Diagram
INPUTBUFFER
A₀
A₁
A₂
A₃
128 x 128
ARRAY
A₄
A₅
A₆
COLUMN
DECODER
POWER
DOWN
(7C168A)
A₇ A₈ A₉A₁₀ A₁₁
I/O₀
I/O₁
I/O₂
I/O₃
CE
WE
C168A-1
Pin Configurations
A₄
A₅
A₆
A₇
A₈
A₉
A₁₀
A₁₁
CE
GND
DIP/SOJ
Top View
1
20
2
19
3
18
4
17
5 7C168A ¹⁶
6\
15
7
14
8
13
9
12
10
11
V_CC
A₃
A₂
A₁
A₀
I/O ₀
I/O ₁
I/O ₂
I/O ₃
WE
C168A-2
Selection Guide
Maximum Access Time (ns)
Maximum Operating
Current (mA)
Commercial
Military
7C168A-15
15
115
-
7C168A-20
20
90
100
7C168A-25
25
90
100
7C168A-35
35
90
100
7C168A-45
45
90
100
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
February 3, 2000