CY7C167A Datasheet, PDF (1/9 Pages) Cypress Semiconductor – 16K x 1 Static RAM

67A
Features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• High speed
— 15 ns
• Low active power
— 495 mW
• Low standby power
— 220 mW
• TTL-compatible inputs and outputs
• Capable of withstanding greater than 2001V electro-
static discharge
• V_IH of 2.2V
CY7C167A
16K x 1 Static RAM
Functional Description
The CY7C167A is a high-performance CMOS static RAM or-
ganized as 16,384 words by 1 bit. Easy memory expansion is
provided by an active LOW Chip Enable (CE) and three-state
drivers. The CY7C167A has an automatic power-down fea-
ture, reducing the power consumption by 67% when
deselected.
Writing to the device is accomplished when the Chip Select
(CE) and Write Enable (WE) inputs are both LOW. Data on the
input pin (DI) is written into the memory location specified on
the address pins (A₀ through A₁₃).
Reading the device is accomplished by taking the Chip Enable
(CE) LOW, while (WE) remains HIGH. Under these conditions,
the contents of the location specified on the address pins will
appear on the data output (DO) pin.
The output pin remains in a high-impedance state when Chip
Enable is HIGH, or Write Enable (WE) is LOW.
A die coat is used to insure alpha immunity.
Logic Block Diagram
INPUT BUFFER
A₀
A₁
A₂
128 x 128
A₃
ARRAY
A₄
A₅
A₆
COLUMN
DECODER
POWER
DOWN
Pin Configuration
DIP
Top View
DI
A_{0 1}
20 ^VCC
A_{1 2}
19
A₁₃
A_{2 3}
18 A12
A_{3 4}
17 A₁₁
A₄
5 _7C167A ¹⁶
A₁₀
A_{5 6}
15 A₉
DO
A_{6 7}
14 A8
DO ₈
13 A₇
WE ₉
12 DI
GND 10
11
CE _C167A-2
CE
WE
C167A-1
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
7C167A-15
15
90
7C167A-20
20
90
7C167A-25
25
90
7C167A-35
35
90
7C167A-45
45
90
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-05027 Rev. **
Revised August 24, 2001