CY7C147 Datasheet, PDF (1/7 Pages) Cypress Semiconductor – 4K x 1 STATIC RAM

7c147: 12/4/89
Revision: Thursday, November 11, 1993
Features
D Automatic powerĆdown when deseĆ
lected
D CMOS for optimum speed/power
Ċ D High speed
25 ns
D Low active power
Ċ 440 mW (commercial)
Ċ 605 mW (military)
Ċ ^{D Low standby power}
55 mW
D TTLĆcompatible inputs and outputs
CY7C147
4K x 1 Static RAM
D Capable of withstanding greater than
2001V electrostatic discharge
Functional Description
CfbTCwp(eCyrhoYMaoEer8t7vduO0)iCsrd%CSe1eba,Y4dywsnr7t71edhbaCdhebytuia1nicttacs4.hdin7RnarEeengaAsaeiectssaMĆthlyseuievtcsamtaeotpteeomeoLdhmrwOagi.goteadWhirrncryĆiicpvzpeoceeeoxhnrrdpwsfispo.auearnmrsemĆsndpi4aoaoTt0nnibwoh9clinn6eees
Wtheriticnhgiptostheleedctev(icCeEis)acacnodmwplriistheedenwahbelne
t(ilonhWcpraoEutut)iogpihnninpAsup(₁^Dte₁^{sc)Iai.)friieesdbwoortnihtttehLneOianWdtdo.rtDehseastpmaineomsn(otAhrey0}
rttoRinhheuegeemtaptadcahuoidientnndcsg(trhDeHetihnspOIsetGes)dpnoHpeianfvib.nsitlc.heUwee(iinCsllldaoEeacc)crpaoLpttimhOeoeanpWsrleisoswpchneohecnitdilhdfebieie(tyWiddotaanoEktsna)Ć,
Tdwahrnietceeoeusnttaaptbueltewp(hiWnenErce)hmiispaLienOnsaWibn.leaishHigIhGĆiHm,poerĆ
Logic Block Diagram
A₀
A₁
A₂
A₃
A₆
A₇
INPUT BUFFER
64 x 64
ARRAY
COLUMN
DECODER
POWER
DOWN
A₄ A₅ A₈ A₉ A₁₀ A₁₁
DI
DO
CE
WE
C147Ć1
Pin Configuration
DIP
Top View
A₀
1
A₁
2
A₂
3
A₃
4
A₄
5
A₅
6
DO
7
WE
8
GND
9
18
17
16
15
14
13
12
11
10
V_CC
A₆
A₇
A₈
A₉
A₁₀
A₁₁
DI
CE
C147Ć2
Selection Guide
Maximum Access Time (ns)
Commercial
Military
Maximum Operating Current (mA) Commercial
Military
Maximum Standby Current (mA) Commercial
Military
7C147-25
25
90
15
7C147-35
35
35
80
110
10
10
7C147-45
45
45
80
110
10
10
Cypress Semiconductor Corporation D 3901 North First Street D San JoseDeceD_{mbeCr 1A989551-34Revi}D_{sed N40o8v-em94b3e-r 12969020}