CY7C1081DV33_1105 Datasheet, PDF (1/13 Pages) Cypress Semiconductor – 64-Mbit (4 M x 16) Static RAM 2.0-V data retention

CY7C1081DV33
64-Mbit (4 M × 16) Static RAM
Features
■ High speed
❐ t_AA = 12 ns
■ Low active power
❐ I_CC = 300 mA at 12 ns
■ Low complementary metal oxide semiconductor (CMOS)
standby power
❐ I_SB2 = 100 mA
■ Operating voltages of 3.3 ± 0.3 V
■ 2.0-V data retention
■ Automatic power-down when deselected
■ Transistor-transistor logic (TTL)-compatible inputs and outputs
■ Easy memory expansion with CE₁ and CE₂ features
■ Available in Pb-free 48-ball fine ball grid array (FBGA) package
Functional Description
The CY7C1081DV33 is a high-performance CMOS static RAM
organized as 4,194,304 words by 16 bits.
To write to the device, take Chip Enables (CE₁ LOW and CE₂
HIGH) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O₀ through I/O₇) is
written into the location specified on the address pins (A₀ through
A₂₁). If Byte High Enable (BHE) is LOW, then data from I/O pins
(I/O₈ through I/O₁₅) is written into the location specified on the
address pins (A₀ through A₂₁).
To read from the device, take Chip Enables (CE₁ LOW and CE₂
HIGH) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins appears
on I/O₀ to I/O₇. If Byte High Enable (BHE) is LOW, then data from
memory appears on I/O₈ to I/O₁₅. See the Truth Table on page
9 for a complete description of read and write modes.
The input and output pins (I/O₀ through I/O₁₅) are placed in a
high impedance state when the device is deselected (CE₁HIGH
or CE₂ LOW), the outputs are disabled (OE HIGH), both byte
high enable and byte low enable are disabled (BHE, BLE HIGH),
or during a write operation (CE₁ LOW, CE₂ HIGH, and WE
LOW).
Logic Block Diagram
DATA_IN DRIVERS
A_(10:0)
4M × 16
RAM ARRAY
COLUMN DECODER
A_(21:11)
I/O₀–I/O₇
I/O₈–I/O₁₅
BHE
WE
CE₂
OE
CE₁
BLE
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-53992 Rev. *C
• San Jose, CA 95134-1709 • 408-943-2600
Revised May 4, 2011
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