CY7C1072AV33 Datasheet, PDF (1/9 Pages) Cypress Semiconductor – 32-Mbit (1M x 32) Static RAM

PRELIMINARY
CY7C1072AV33
32-Mbit (1M x 32) Static RAM
Features
• High density 32-Mbit SRAM
• High speed
— t_AA = 10 ns
• Low active power
— I_CC = 450 mA
• Operating voltages of 3.3 ± 0.3V
• 2.0V data retention
• Automatic power-down when deselected
• TTL compatible inputs and outputs
• Available in standard 119-ball FBGA
Functional Description
The CYM1072AV33 is a 3.3V high-performance 32-Megabit
static RAM organized as 1M words by 32 bits.
Writing to the device is accomplished by enabling the chip
(CE₁ LOW and CE₂ HIGH) while forcing the Write Enable
(WE) input LOW. If Byte Enable A (B_A) is LOW, then data from
the I/O pins (I/O₀ through I/O₇), is written into the location
Logic Block Diagram
INPUT BUFFERS
A₀
A₁
A₂
A₃
A₄
1024K x 32
ARRAY
A₅
A₆
A₇
A₈
A₉
specified on the address pins (A₀ through A₁₉). If Byte Enable
B (B_B) is LOW, then data from I/O pins (I/O₈ through I/O₁₅) is
written into the location specified on the address pins (A₀
through A₁₉). Likewise, B_C and B_D correspond with the I/O
pins I/O₁₆ to I/O₂₃ and I/O₂₄ to I/O₃₁, respectively.
Reading from the device is accomplished by enabling the chip
by taking CE₁ LOW and CE₂ HIGH while forcing the Output
Enable (OE) LOW and the Write Enable (WE) HIGH. If the first
Byte Enable (B_A) is LOW, then data from the memory location
specified by the address pins will appear on I/O₀ to I/O₇. If Byte
Enable B (B_B) is LOW, then data from memory will appear on
I/O₈ to I/O₁₅. Similarly, B_c and B_D correspond to the third and
fourth bytes. See the truth table at the back of this data sheet
for a complete description of read and write modes.
The input/output pins (I/O₀ through I/O₃₁) are placed in a
high-impedance state when the device is deselected (CE₁
HIGH/CE₂ LOW), the outputs are disabled (OE HIGH), the
byte selects are disabled (B_A-D HIGH), or during a Write
operation (CE₁ LOW, CE₂ HIGH, and WE LOW).
The CY7C1072AV33 is available in a 119-ball grid array
(FBGA) package.
WE
CE₁
CE₂
OE
B_A
B_B
B_C
B_D
I/O₀–I/O₃₁
COLUMN
DECODER
Selection Guide
Maximum Access Time
Maximum Operating Current
Maximum Standby Current
CY7C1072AV33-10 CY7C1072AV33-12
Unit
10
12
ns
450
400
mA
100
100
mA
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-05635 Rev. *A
Revised September 1, 2005