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CY7C1061AV33_11 Datasheet, PDF (1/13 Pages) Cypress Semiconductor – 16-Mbit (1 M × 16) Static RAM
CY7C1061AV33
16-Mbit (1 M × 16) Static RAM
Features
■ High speed
❐ tAA = 10 ns
■ Low active power
❐ 990 mW (max)
■ Operating voltages of 3.3 ± 0.3 V
■ 2.0 V data retention
■ Automatic power down when deselected
■ TTL compatible inputs and outputs
■ Easy memory expansion with CE1 and CE2 features
■ Available in Pb-free and non Pb-free 54-pin TSOP II package
and non Pb-free 60-ball fine pitch ball grid array (FBGA)
package
Logic Block Diagram
Functional Description
The CY7C1061AV33 is a high performance CMOS Static RAM
organized as 1,048,576 words by 16 bits.
To write to the device, enable the chip (CE1 LOW and CE2 HIGH)
while forcing the Write Enable (WE) input LOW. If Byte Low
Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7),
is written into the location specified on the address pins (A0
through A19). If Byte High Enable (BHE) is LOW, then data from
I/O pins (I/O8 through I/O15) is written into the location specified
on the address pins (A0 through A19).
To read from the device, enable the chip by taking CE1 LOW and
CE2 HIGH while forcing the Output Enable (OE) LOW and the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins will
appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then
data from memory will appear on I/O8 to I/O15. See “Truth Table”
on page 8 for a complete description of Read and Write modes.
The input/output pins (I/O0 through I/O15) are placed in a
high-impedance state when the device is deselected (CE1
HIGH/CE2 LOW), the outputs are disabled (OE HIGH), the BHE
and BLE are disabled (BHE, BLE HIGH), or a Write operation is
in progress (CE1 LOW, CE2 HIGH, and WE LOW).
INPUT BUFFER
A0
A1
A2
A3
A4
A5
1M x 16
ARRAY
A6
A7
A8
A9
COLUMN
DECODER
I/O0–I/O7
I/O8–I/O15
BHE
WE
CE2
OE
CE1
BLE
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 38-05256 Rev. *J
• San Jose, CA 95134-1709 • 408-943-2600
Revised February 2, 2011
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