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CY7C1049CV33AUTO Datasheet, PDF (1/13 Pages) Cypress Semiconductor – 4-Mbit (512 K × 8) Static RAM TTL-compatible inputs and outputs
4-Mbit (512 K × 8) Static RAM
Features
■ Temperature ranges
❐ Automotive -A: –40 °C to 85 °C
❐ Automotive-E: –40 °C to 125 °C
■ High speed
❐ tAA = 10 ns
■ Low active power
❐ 360 mW (max)
■ 2.0 V data retention
■ Automatic power down when deselected
■ TTL-compatible inputs and outputs
■ Easy memory expansion with CE and OE features
Logic Block Diagram
CY7C1049CV33 Automotive
4-Mbit (512 K × 8) Static RAM
Functional Description
The CY7C1049CV33 Automotive is a high performance CMOS
Static RAM organized as 524,288 words by eight bits. Easy
memory expansion is provided by an active LOW Chip Enable
(CE), an active LOW Output Enable (OE), and three-state
drivers. Writing to the device is accomplished by taking Chip
Enable (CE) and Write Enable (WE) inputs LOW. Data on the
eight I/O pins (I/O0 through I/O7) is then written into the location
specified on the address pins (A0 through A18).
Reading from the device is accomplished by taking Chip Enable
(CE) and Output Enable (OE) LOW while forcing Write Enable
(WE) HIGH. Under these conditions, the contents of the memory
location specified by the address pins appear on the I/O pins.
The eight input and output pins (I/O0 through I/O7) are placed in
a high impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1049CV33 Automotive is available in standard
400-mil-wide 36-pin SOJ package and 44-pin TSOP II package
with center power and ground (revolutionary) pinout.
For best practice recommendations, refer to the Cypress
application note AN1064, SRAM System Guidelines.
A0
A1
INPUT BUFFER
IO0
A2
A3
IO1
A4
A5
IO2
A6
A7
512K x 8
IO3
A8
A9
ARRAY
IO4
A10
A11
IO5
A12
IO6
CE
WE
COLUMN DECODER
POWER
DOWN
IO7
OE
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-67511 Rev. **
• San Jose, CA 95134-1709
•408-943-2600
Revised February 16, 2011
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