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CY7C1041CV33AUTO Datasheet, PDF (1/17 Pages) Cypress Semiconductor – 4-Mbit (256 K × 16) Static RAM TTL-compatible inputs and outputs
CY7C1041CV33 Automotive
4-Mbit (256 K × 16) Static RAM
4-Mbit (256 K × 16) Static RAM
Features
■ Temperature ranges
❐ Automotive-A: –40 °C to 85 °C
❐ Automotive-E: –40 °C to 125 °C
■ Pin and function compatible with CY7C1041BNV33
■ High speed
❐ tAA = 10 ns (Automotive-A)
❐ tAA = 12 ns (Automotive-E)
■ Low active power
❐ 432 mW (max)
■ 2.0 V data retention
■ Automatic power down when deselected
■ TTL-compatible inputs and outputs
■ Easy memory expansion with CE and OE features
■ Available in Pb-free and non Pb-free 44-pin 400 Mil SOJ, 44-pin
TSOP II and 48-ball FBGA packages
Functional Description
The CY7C1041CV33 Automotive is a high performance CMOS
static RAM organized as 262,144 words by 16 bits.
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O0 through I/O7), is written into the location
specified on the address pins (A0 through A17). If Byte High
Enable (BHE) is LOW, then data from I/O pins (I/O8 through
I/O15) is written into the location specified on the address pins
(A0 through A17).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appear on I/O0 to I/O7. If
Byte High Enable (BHE) is LOW, then data from memory
appears on I/O8 to I/O15. For more information, see the Truth
Table on page 10 for a complete description of Read and Write
modes.
The input and output pins (I/O0 through I/O15) are placed in a
high impedance state when the device is deselected (CE HIGH),
the outputs are disabled (OE HIGH), the BHE and BLE are
disabled (BHE, BLE HIGH), or during a write operation (CE LOW
and WE LOW).
For best practice recommendations, refer to the Cypress
application note AN1064, SRAM System Guidelines.
Logic Block Diagram
INPUT BUFFER
AA01
A2
A3
A4
A5
256K x 16
RAM Array
A6
A7
A8
I/O0–I/O7
I/O8–I/O15
COLUMN DECODER
BHE
WE
CE
OE
BLE
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-67307 Rev. **
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 11, 2011
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