CY7C1021BN_09 Datasheet, PDF (1/10 Pages) Cypress Semiconductor – 1-Mbit (64K x 16) Static RAM

CY7C1021BN
CY7C10211BN
1-Mbit (64K x 16) Static RAM
Features
• Temperature Ranges
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive-A: –40°C to 85°C
— Automotive-E: –40°C to 125°C
• High speed
— t_AA = 10 ns (Commercial)
— t_AA = 15 ns (Automotive)
• CMOS for optimum speed/power
• Low active power
— 825 mW (max.)
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in Pb free and non Pb free 44-pin TSOP II and
44-pin 400-mil-wide SOJ
Functional Description^[1]
The CY7C1021BN/CY7C10211BN is a high-performance
CMOS static RAM organized as 65,536 words by 16 bits. This
device has an automatic power-down feature that significantly
reduces power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O₁ through I/O₈), is
written into the location specified on the address pins (A₀
through A₁₅). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O₉ through I/O₁₆) is written into the location
specified on the address pins (A₀ through A₁₅).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O₁ to I/O₈. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O₉ to I/O₁₆. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
The input/output pins (I/O₁ through I/O₁₆) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1021BN/CY7C10211BN is available in standard
44-pin TSOP Type II and 44-pin 400-mil-wide SOJ packages.
Customers should use part number CY7C10211BN when
ordering parts with 10 ns t_AA, and CY7C1021BN when
ordering 12 ns and 15 ns t_AA.
Logic Block Diagram
DATA IN
DRIVERS
PinConfigurations
SOJ / TSOP II
Top View
A₇
A₆
A₅
64K x 16
A₄
RAM Array
A₃
512 X 2048
A₂
A₁
A₀
COLUMN DECODER
I/O₁–I/O₈
I/O₉–I/O₁₆
BHE
WE
CE
OE
BLE
A₄ 1
A₃ 2
A₂ 3
A₁ 4
A₀ 5
CE 6
I/O₁ 7
I/O₂ 8
I/O₃ 9
I/O₄ 10
V_CC 11
V_SS 12
I/O₅ 13
I/O₆ 14
I/O₇ 15
I/O₈ 16
WE 17
A₁₅ ¹⁸
A₁₄ 19
A₁₃ 20
A₁₂ 21
NC 22
44 _A5
43 A₆
42 _A7
41 OE
40 _BHE
39 _BLE
38 _I/O16
37 _I/O15
36 _I/O14
35 _I/O13
34 _VSS
33 _VCC
32 I/O₁₂
31 I/O₁₁
30 I/O₁₀
29 I/O₉
28 _NC
27 A₈
26 A₉
25 A₁₀
24 A11
23 NC
Note:
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 001-06494 Rev. *A
Revised September 28, 2006