CY7C1019BN Datasheet, PDF (1/8 Pages) Cypress Semiconductor – 128K x 8 Static RAM

Features
• High speed
— t_AA = 12, 15 ns
• CMOS for optimum speed/power
• Center power/ground pinout
• Automatic power-down when deselected
• Easy memory expansion with CE and OE options
• Functionally equivalent to CY7C1019
Logic Block Diagram
A₀
A₁
A₂
A₃
A₄
A₅
A₆
A₇
A₈
CE
WE
OE
INPUT BUFFER
512 x 256 x 8
ARRAY
COLUMN
DECODER
POWER
DOWN
CY7C1019BN
128K x 8 Static RAM
Functional Description
The CY7C1019BN is a high-performance CMOS static RAM
organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and three-state drivers. This
device has an automatic power-down feature that significantly
reduces power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O₀ through I/O₇) is then written into the location
specified on the address pins (A₀ through A₁₆).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O₀ through I/O₇) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1019BN is available in standard 32-pin TSOP Type
II and 400-mil-wide SOJ packages.
Pin Configurations
SOJ / TSOPII
Top View
A_{0 1}
32 A₁₆
A_{1 2}
31 A₁₅
A_{2 3}
30 _A14
I/O₀
A_{3 4}
29 A₁₃
CE 5
28 _OE
I/O₁
I/O₀ 6
27 _I/O7
I/O₁ 7
26 _I/O6
I/O₂
V_{CC 8}
25 _VSS
I/O₃
V _{SS 9}
I/O_{2 10}
24 _VCC
23 I/O₅
I/O₄
I/O_{3 11}
WE 12
22 I/O₄
21 ^A12
I/O₅
A_{4 13}
20 ^A11
A_{5 14}
19 ^A10
I/O₆
A_{6 15}
18 ^A9
A₇ 16
17 A₈
I/O₇
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 001-06425 Rev. **
Revised February 1, 2006