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CY7C1016 Datasheet, PDF (1/1 Pages) Cypress Semiconductor – 256K x Static RAM
7c1006: 11-25-91
Revision: April 10, 1995
ADVANCED INFORMATION CY7C1016
256K x 4 Static RAM
Features
D High speed
Ċ tAA = 10 ns
D Output enable (OE) feature
D CMOS for optimum speed/power
D Center power/ground pinout
D Automatic powerĆdown when
deselected
D TTL Ćcompatible inputs and outputs
Functional Description
The CY7C1016 is a highĆperformance
CMOS static RAM organized as 262,144
words by 4 bits. Easy memory expansion is
provided by an active LOW chip enable
aa(CnudtEo)tmh, araentieacĆcpsttoiavwteeeLrdĆOrdivoWewrons.ufTetpahuteutrdeeentvahibcaletesh(igOansEiaf)inĆ,
cantly reduces power consumption when
deselected.
Writing to the device is accomplished by
t(pinaWikntoiEsnt)(ghIie/cnOhploi0upcttaeshtnriLoaoOnbulgWsehp.(eCDIc/EiOafit)3ea)adoniosndnttwhhtrheeientefoawedurndriatrItbe/eOlsnes
pins (A0 through A17).
fRboyeractiadnkigningwgfrrictohemiepnthaeebnladebe(lveWic(EeC)iEsH)acILGcOoHmW.pUlwinshhdieelder
tmphienemsseworiclyloalnopdcpiatetiaioornnos,snpttehhceeififeocdounrbtIye/Onthtsepianodsfd. rtehses
wTI/Ohhee3n)fotahureer dpinelapvcuicete/doiiusndtpaeuhsetiglpehicnĆtisemd(pI(/eOCdE0antHhcreIoGsutHagth)e,
or during a write operation (CE and WE
LOW).
The CY7C1016 is available in standard
400ĆmilĆwide SOJs.
Logic Block Diagram
A1
A2
A3
A4
A5
A6
A7
A8
A9
INPUT BUFFER
512 x 512 x 4
ARRAY
COLUMN
DECODER
POWER
DOWN
I/O3
I/O2
I/O1
I/O0
CE
WE
C1016-1
Pin Configuration
SOJ
Top View
NC
1
A0
2
A1
3
A2
4
A3
5
CE
6
I/O0
7
VCC
8
GND 9
I/O1
10
WE
11
A4
12
A5
13
A6
14
A7
15
NC
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A17
A16
A15
A14
A13
OE
I/O3
GND
VCC
I/O2
A12
A11
A10
A9
A8
NC
C1016-2
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
Document #: 38-00439
Commercial
Military
Commercial
Military
7C1016-10
10
175
55
7C1016-12
12
165
175
50
50
7C1016-15
15
155
165
40
40
Cypress Semiconductor Corporation
D
3901 North First S1treet
D San Jose D CA 95134 D 408-943-2600
April 1995