CY7C1011BV33 Datasheet, PDF (1/10 Pages) Cypress Semiconductor – 128K x 16 Static RAM

CY7C1011BV33
Features
• 3.0 – 3.6V Operation
• High speed
— t_AA = 12, 15 ns
• CMOS for optimum speed/power
• Low active power
— 684 mW (Max.)
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 44-pin TSOP II
Functional Description
The CY7C1011BV33 is a high-performance CMOS static
RAM organized as 131,072 words by 16 bits. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
128K x 16 Static RAM
(BLE) is LOW, then data from I/O pins (I/O₁ through I/O₈), is
written into the location specified on the address pins (A₀
through A₁₅). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O₉ through I/O₁₆) is written into the location
specified on the address pins (A₀ through A₁₆).
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
will appear on I/O₁ to I/O₈. If Byte High Enable (BHE) is LOW,
then data from memory will appear on I/O₉ to I/O₁₆. See the
truth table at the back of this data sheet for a complete descrip-
tion of read and write modes.
The input/output pins (I/O₁ through I/O₁₆) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1011BV33 is available in standard 44-pin TSOP
Type II package.
Logic Block Diagram
DATA IN DRIVERS
A₇
A₆
A₅
128K x 16
A₄
RAM Array
A₃
512 X 2048
A₂
A₁
A₀
COLUMN DECODER
I/O₁–I/O₈
I/O₉–I/O₁₆
BHE
WE
CE
OE
BLE
1011B-1
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-05021 Rev. *A
Revised June 6, 2001