CY7C1001 Datasheet, PDF (1/9 Pages) Cypress Semiconductor – 256K x 4 Static RAM with Separate I/O

Features
D High speed
Ċ t_AA = 12 ns
D Transparent write (7C1001)
D CMOS for optimum speed/power
D Low active power
Ċ 910 mW
D Low standby power
Ċ 275 mW
D 2.0V data retention (optional)
Ċ µ 100 W
D Automatic powerĆdown when
deselected
D TTL Ćcompatible inputs and outputs
CY7C1001
PRELIMINARY
CY7C1002
256wKitxh4SSetpaatircatReAI/MO
Functional Description
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Logic Block Diagram
A₀
A₁
A₂
A₃
A₄
A₅
A₆
A₇
A₈
INPUT BUFFER
512 x 512 x 4
ARRAY
COLUMN
DECODER
POWER
DOWN
7C1002 ONLY
7C1001 ONLY
I₀
I₁
I₂
I₃
O₀
O₁
O₂
O₃
CE
WE
Pin Configuration
DIP/SOJ
Top View
NC
A₁₆
A₁₇
A₀
A₁
A₂
A₁₀
A₁₁
A₁₂
A₁₃
A₁₄
A₉
I₃
I₂
CE
GND
1
32
2
31
3
30
4
29
5
28
6
27
7
26
8
7C1001
7C1002
25
9
24
10
23
11
22
12
21
13
20
14
19
15
18
16
17
V_CC
A₁₅
A₃
A₄
A₅
A₆
A₇
A₈
NC
I₀
I₁
O₀
O₁
O₂
O₃
WE
C1001-2
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current Commercial
Military
Maximum Standby Current (mA) Commercial
Military
C1001-1
7C1001-12
7C1002-12
12
165
50
7C1001-15
7C1002-15
15
155
165
40
40
7C1001-20
7C1002-20
20
140
150
30
30
7C1001-25
7C1002-25
25
130
140
30
30
Cypress Semiconductor Corporation D 3901 North First S1treet D San Jose D_{NoveCmAbe9r51139491 -}D_{Rev4is0e8d-A94p3r-il 12969050}