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CY6264 Datasheet, PDF (1/8 Pages) Cypress Semiconductor – 8K x 8 Static RAM
1CY 626 4
PRELIMINARY
CY6264
Features
• 55, 70 ns access times
• CMOS for optimum speed/power
• Easy memory expansion with CE1, CE2, and OE fea-
tures
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
Functional Description
The CY6264 is a high-performance CMOS static RAM orga-
nized as 8192 words by 8 bits. Easy memory expansion is
provided by an active LOW chip enable (CE1), an active HIGH
chip enable (CE2), and active LOW output enable (OE) and
three-state drivers. Both devices have an automatic pow-
er-down feature (CE1), reducing the power consumption by
8K x 8 Static RAM
over 70% when deselected. The CY6264 is packaged in a
450-mil (300-mil body) SOIC.
An active LOW write enable signal (WE) controls the writ-
ing/reading operation of the memory. When CE1 and WE in-
puts are both LOW and CE2 is HIGH, data on the eight data
input/output pins (I/O0 through I/O7) is written into the memory
location addressed by the address present on the address
pins (A0 through A12). Reading the device is accomplished by
selecting the device and enabling the outputs, CE1 and OE
active LOW, CE2 active HIGH, while WE remains inactive or
HIGH. Under these conditions, the contents of the location ad-
dressed by the information on address pins is present on the
eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH. A die coat is used to insure alpha immunity.
Logic Block Diagram
Pin Configuration
A1
A2
A3
A4
A5
A6
A7
A8
CE1
CE2
WE
OE
INPUT BUFFER
256 x 32 x 8
ARRAY
POWER
COLUMN DECODER DOWN
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
CY6264-1
SOIC
Top View
NC 1
A4 2
A5 3
A6 4
A7 5
A8 6
A9 7
A10 8
A11 9
A12 10
I/O0 11
I/O1 12
I/O2 13
GND 14
28 VCC
27 WE
26 CE2
25 A3
24 A2
23 A1
22 OE
21 A0
20 CE1
19 I/O7
18 I/O6
17 I/O5
16 I/O4
15 I/O3
CY6264-2
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
Shaded area contains advanced information.
CY6264-55
55
100
20/15
CY6264-70
70
100
20/15
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
October 1994 – Revised June 1996