English
Language : 

CY62158E_09 Datasheet, PDF (1/10 Pages) Cypress Semiconductor – 8-Mbit (1M x 8) Static RAM
CY62158E MoBL®
8-Mbit (1M x 8) Static RAM
Features
■ Very high speed: 45 ns
❐ Wide voltage range: 4.5V – 5.5V
■ Ultra low active power
❐ Typical active current:1.8 mA @ f = 1 MHz
❐ Typical active current: 18 mA @ f = fmax
■ Ultra low standby power
❐ Typical standby current: 2 μA
❐ Maximum standby current: 8 μA
■ Easy memory expansion with CE1, CE2 and OE features
■ Automatic power down when deselected
■ CMOS for optimum speed and power
■ Offered in Pb-free 44-Pin TSOP II package
Functional Description
The CY62158E MoBL® is a high performance CMOS static RAM
organized as 1024K words by 8 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL®) in portable
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption. Placing the device into standby mode reduces
power consumption significantly when deselected (CE1 HIGH or
CE2 LOW).
To write to the device, take Chip Enables (CE1 LOW and CE2
HIGH) and Write Enable (WE) input LOW. Data on the eight IO
pins (IO0 through IO7) is then written into the location specified
on the address pins (A0 through A19).
To read from the device, take Chip Enables (CE1 LOW and CE2
HIGH) and OE LOW while forcing the WE HIGH. Under these
conditions, the contents of the memory location specified by the
address pins appear on the IO pins.
The eight input and output pins (IO0 through IO7) are placed in
a high impedance state when the device is deselected (CE1
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or a
write operation is in progress (CE1 LOW and CE2 HIGH and WE
LOW). See the Truth Table on page 8 for a complete description
of read and write modes.
For best practice recommendations, refer to the Cypress
application note AN1064, SRAM System Guidelines.
Logic Block Diagram
A0
DATA IN DRIVERS
A1
IO0
A2
A3
IO1
A4
A5
IO2
A6
1024K x 8
A7
IO3
A8
ARRAY
A9
IO4
A10
A11
IO5
A12
IO6
CE1
CE2
WE
COLUMN DECODER
POWER
DOWN
IO7
OE
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 38-05684 Rev. *D
• San Jose, CA 95134-1709 • 408-943-2600
Revised June 16, 2008
[+] Feedback