CY62157EV18_11 Datasheet, PDF (1/16 Pages) Cypress Semiconductor – 8-Mbit (512K x 16) Static RAM Automatic power down when deselected

CY62157EV18 MoBL^®
8-Mbit (512K x 16) Static RAM
8-bit (512K x 16) Static RAM
Features
■ Very high speed: 55 ns
■ Wide voltage range: 1.65 V–2.25 V
■ Pin compatible with CY62157DV18 and CY62157DV20
■ Ultra low standby power
❐ Typical Standby current: 2 A
❐ Maximum Standby current: 8 A
■ Ultra low active power
❐ Typical active current: 1.8 mA at f = 1 MHz
■ Easy memory expansion with CE₁, CE₂ and OE features
■ Automatic power down when deselected
■ Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
■ Available in Pb-free 48-ball very fine-pitch ball grid array
(VFBGA) package
Functional Description
The CY62157EV18 is a high performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL^®) in portable
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. The device can
also be put into standby mode when deselected (CE₁ HIGH or
CE₂ LOW or both BHE and BLE are HIGH). The input and output
pins (I/O₀ through I/O₁₅) are placed in a high impedance state
when:
■ Deselected (CE₁ HIGH or CE₂ LOW)
■ Outputs are disabled (OE HIGH)
■ Both Byte High Enable and Byte Low Enable are disabled
(BHE, BLE HIGH) or
■ Write operation is active (CE₁ LOW, CE₂ HIGH and WE LOW).
Write to the device by taking Chip Enables (CE₁ LOW and CE₂
HIGH) and Write Enable (WE) input LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O₀ through I/O₇), is
written into the location specified on the address pins (A₀ through
A₁₈). If Byte High Enable (BHE) is LOW, then data from I/O pins
(I/O₈ through I/O₁₅) is written into the location specified on the
address pins (A₀ through A₁₈).
Read from the device by taking Chip Enables (CE₁ LOW and
CE₂ HIGH) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins appear
on I/O₀ to I/O₇. If Byte High Enable (BHE) is LOW, then data from
memory appears on I/O₈ to I/O₁₅. See the “Truth Table” on
page 11 for a complete description of read and write modes.
Product Portfolio
Product
CY62157EV18
V_CC Range (V)
Min
1.65
Typ ^[1]
1.8
Max
2.25
Speed
(ns)
55
Power Dissipation
Operating I_CC, (mA)
f = 1MHz
f = f_max
Standby, I_SB2 (A)
Typ ^{[1] Max} Typ ^{[1] Max}
Typ ^[1]
Max
1.8
3
18
25
2
8
Note
1. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V_CC = V_CC(typ), T_A = 25 °C.
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 38-05490 Rev. *H
• San Jose, CA 95134-1709 • 408-943-2600
Revised June 29, 2011