CY62157CV18 Datasheet, PDF (1/11 Pages) Cypress Semiconductor – 512K x 16 Static RAM

CY62157CV18 MoBL2™
Features
• High Speed
— 55 ns and 70 ns availability
• Low voltage range:
— CY62157CV18: 1.65V–1.95V
• Ultra-low active power
— Typical Active Current: 0.5 mA @ f = 1 MHz
— Typical Active Current: 4 mA @ f = f_max (70 ns speed)
• Low standby power
• Easy memory expansion with CE₁, CE₂ and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
Functional Description
The CY62157CV18 is a high-performance CMOS static RAM
organized as 512K words by 16 bits. This device features ad-
vanced circuit design to provide ultra-low active current. This
is ideal for providing More Battery Life™ (MoBL™) in portable
applications such as cellular telephones. The device also has
an automatic power-down feature that significantly reduces
power consumption by 99% when addresses are not toggling.
Logic Block Diagram
512K x 16 Static RAM
The device can also be put into standby mode when deselect-
ed (CE₁ HIGH or CE₂ LOW or both BHE and BLE are HIGH).
The input/output pins (I/O₀ through I/O₁₅) are placed in a
high-impedance state when: deselected (CE₁ HIGH or CE₂
LOW), outputs are disabled (OE HIGH), both Byte High Enable
and Byte Low Enable are disabled (BHE, BLE HIGH), or during
a write operation (CE₁ LOW, CE₂ HIGH and WE LOW).
Writing to the device is accomplished by taking Chip Enables
(CE₁ LOW and CE₂ HIGH) and Write Enable (WE) inputs
LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins
(I/O₀ through I/O₇), is written into the location specified on the
address pins (A₀ through A₁₈). If Byte High Enable (BHE) is
LOW, then data from I/O pins (I/O₈ through I/O₁₅) is written into
the location specified on the address pins (A₀ through A₁₈).
Reading from the device is accomplished by taking Chip En-
able (CE₁ LOW and CE₂ HIGH) and Output Enable (OE) LOW
while forcing the Write Enable (WE) HIGH. If Byte Low Enable
(BLE) is LOW, then data from the memory location specified
by the address pins will appear on I/O₀ to I/O₇. If Byte High
Enable (BHE) is LOW, then data from memory will appear on
I/O₈ to I/O₁₅. See the truth table at the back of this datasheet
for a complete description of read and write modes.
The CY62157CV18 is available in a 48-ball FBGA package.
DATA IN DRIVERS
A₁₀
A₉
A₈
A₇
A₆
512K x 16
A₅
RAM Array
A₄
2048 X 4096
A₃
A₂
A₁
A₀
I/O₀–I/O₇
I/O₈–I/O₁₅
COLUMN DECODER
Power -Down
Circuit
BHE
BLE
BHE
WE
CE₂
CE₁
OE
BLE
CE₂
CE₁
MoBL, MoBL2, and More Battery Life are trademarks of Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-05012 Rev. *C
Revised October 31, 2001