CY62148DV30_07 Datasheet, PDF (1/10 Pages) Cypress Semiconductor – 4-Mbit (512K x 8) MoBL® Static RAM

CY62148DV30
4-Mbit (512K x 8) MoBL^® Static RAM
Features
• Temperature Ranges
— Industrial: –40°C to 85°C
— Automotive-A: –40°C to 85°C
• Very high speed: 55 ns
— Wide voltage range: 2.20V – 3.60V
• Pin-compatible with CY62148CV25, CY62148CV30 and
CY62148CV33
• Ultra low active power
— Typical active current: 1.5 mA @ f = 1 MHz
— Typical active current: 8 mA @ f = f_max(55-ns speed)
• Ultra low standby power
• Easy memory expansion with CE, and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Available in Pb-free and non Pb-free 36-ball VFBGA,
Pb-free 32-pin TSOPII and 32-pin SOIC packages
Logic Block Diagram
Functional Description^[1]
The CY62148DV30 is a high-performance CMOS static RAM
organized as 512K words by 8 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life™ (MoBL^®) in
portable applications such as cellular telephones. The device
also has an automatic power-down feature that significantly
reduces power consumption. The device can be put into
standby mode reducing power consumption when deselected
(CE HIGH).The eight input and output pins (IO₀ through IO₇)
are placed in a high-impedance state when:
• Deselected (CE HIGH)
• Outputs are disabled (OE HIGH)
• When the write operation is active(CE LOW and WE LOW)
Write to the device by taking Chip Enable (CE) and Write
Enable (WE) inputs LOW. Data on the eight IO pins (IO₀
through IO₇) is then written into the location specified on the
address pins (A₀ through A₁₈).
Read from the device by taking Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH.
Under these conditions, the contents of the memory location
specified by the address pins will appear on the IO pins.
AA₁₀
AAAAA₂₄₅₃₆
AA₇₈
A₉
A₁₀
AA₁₁₂₁
CE
WE
OE
Data in Drivers
512K x 8
ARRAY
COLUMN
DECODER
POWER
DOWN
IO ₀
IO ₁
IO ₂
IO ₃
IO ₄
IO ₅
IO ₆
IO ₇
Note:
1. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-05341 Rev. *D
Revised January 25, 2007
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