CY62148BN Datasheet, PDF (1/9 Pages) Cypress Semiconductor – 4-Mbit (512K x 8) Static RAM

Features
• 4.5V–5.5V operation
• Low active power
— Typical active current: 2.5 mA @ f = 1 MHz
— Typical active current:12.5 mA @ f = fmax
• Low standby current
• Automatic power down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
• CMOS for optimum speed and power
• Available in standard Pb-free and non Pb-free 32-lead
(450-mil) SOIC and 32-lead TSOP II packages
Logic Block Diagram
CY62148BN MoBL^®
4-Mbit (512K x 8) Static RAM
Functional Description
The CY62148BN is a high performance CMOS static RAM
organized as 512K words by 8 bits. Easy memory expansion
is provided by an active LOW Chip Enable (CE), an active
LOW Output Enable (OE), and tri-state drivers. This device
has an automatic power down feature that reduces power
consumption by more than 99% when deselected.
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. Data on the eight I/O pins (I/O₀ through
I/O₇) is then written into the location specified on the address
pins (A₀ through A₁₈).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH for
read. Under these conditions, the contents of the memory
location specified by the address pins appear on the I/O pins.
The eight input/output pins (I/O₀ through I/O₇) go into a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or a write
operation is in progress (CE LOW and WE LOW).
A₀
A₁
A₄
A₅
A₆
A₇
A₁₂
A₁₄
A₁₆
A₁₇
CE
WE
OE
INPUT BUFFER
512K x 8
ARRAY
COLUMN
DECODER
POWER
DOWN
I/O₀
I/O₁
I/O₂
I/O₃
I/O₄
I/O₅
I/O₆
I/O₇
Cypress Semiconductor Corporation
Document #: 001-06517 Rev. *B
• 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Revised March 1, 2007
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