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CY62138FV30_11 Datasheet, PDF (1/18 Pages) Cypress Semiconductor – 2-Mbit (256 K x 8) Static RAM Automatic power down when deselected
CY62138FV30 MoBL®
2-Mbit (256 K × 8) Static RAM
2-Mbit (256 K × 8) Static RAM
Features
■ Very high-speed: 45 ns
■ Temperature ranges
❐ Industrial: –40 °C to 85 °C
❐ Automotive-A: –40 °C to 85 °C
■ Wide voltage range: 2.20 V to 3.60 V
■ Pin compatible with CY62138CV25/30/33
■ Ultra low standby power
❐ Typical standby current: 1 A
❐ Maximum standby current: 5 A
■ Ultra low active power
❐ Typical active current: 1.6 mA at f = 1 MHz
■ Easy memory expansion with CE1, CE2, and OE Features
■ Automatic power down when deselected
■ Complementary metal oxide semiconductor (CMOS) for
Optimum speed and power
■ Offered in Pb-free 36-ball VFBGA, 32-pin TSOP II, 32-pin
SOIC, 32-pin TSOP I and 32-pin STSOP packages
Functional Description
The CY62138FV30 is a high performance CMOS static RAM
organized as 256K words by 8 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL) in portable
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption. Place the device into standby mode reducing
power consumption when deselected (CE1 HIGH or CE2 LOW).
To write to the device, take Chip Enable (CE1 LOW and CE2
HIGH) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O0 through I/O7) is then written into the location specified
on the address pins (A0 through A17).
To read from the device, take Chip Enable (CE1 LOW and CE2
HIGH) and Output Enable (OE) LOW while forcing Write Enable
(WE) HIGH. Under these conditions, the contents of the memory
location specified by the address pins appear on the I/O pins.
The eight input and output pins (I/O0 through I/O7) are placed in
a high impedance state when the device is deselected (CE1
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or
during a write operation (CE1 LOW and CE2 HIGH and WE
LOW).
Logic Block Diagram
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-08029 Rev. *K
• San Jose, CA 95134-1709 • 408-943-2600
Revised June 16, 2011
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