CY62127BV_02 Datasheet, PDF (1/11 Pages) Cypress Semiconductor – 1M (64K x 16) Static RAM

CY62127BV MoBL^®
1M (64K x 16) Static RAM
Features
• High Speed: 55 ns and 70 ns
• Wide voltage range: 2.7V–3.6V
• Low active power
— 54 mW (max.) (15 mA)
• Low standby power (70 ns)
— 54 µW (max.) (15 µA)
• Easy memory expansion with CE and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Package available in a 44-pin TSOP Type II (forward
pinout) and a 48-ball fBGA package
Functional Description^[1]
The CY62127BV MoBL^® MoBL^® is a high-performance
CMOS static RAM organized as 64K words by 16 bits. This
device features advanced circuit design to provide ultra-low
active current. This is ideal for providing More Battery Life
(MoBL) in portable applications such as cellular telephones.
The device also has an automatic power-down feature that
Logic Block Diagram
DATA IN DRIVERS
A₁₀
A₉
A₈
A₇
A₆
64K x 16
A₅
RAM Array
A₄
2048 X 512
A₃
A₂
A₁
A₀
significantly reduces power consumption when addresses are
not toggling, or when deselected (CE HIGH or both BLE and
BHE are HIGH). The input/output pins (I/O₀ through I/O₁₅) are
placed in a high-impedance state when: deselected (CE
HIGH), outputs are disabled (OE HIGH), both Byte High
Enable and Byte Low Enable are disabled (BHE, BLE HIGH),
or during a write operation (CE LOW, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O₁ through I/O₈), is
written into the location specified on the address pins (A₀
through A₁₅). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O₉ through I/O₁₆) is written into the location
specified on the address pins (A₀ through A₁₅).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O₀ to I/O₇. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O₈ to I/O₁₅. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
I/O₀–I/O₇
I/O₈–I/O₁₅
COLUMN DECODER
Power -Down
Circuit
CE
BHE
BLE
BHE
WE
CE
OE
BLE
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-05155 Rev. *B
Revised August 27, 2002