CY3LV512 Datasheet, PDF (1/9 Pages) Cypress Semiconductor – 512K / 1 Mbit CPLD Boot EEPROM

PRELIMINARY
CY3LV512/010
512K / 1 Mbit CPLD Boot EEPROM
Features
• EE Reprogrammable 524,288 x 1- and 1,048,576 x 1-bit
Serial Memories Designed to Store Configuration Data for
Complex Programmable Logic Devices (CPLDs)
• In-System Programmable via two-wire Bus using Cypress’s
CYDH2200E Programming Kits
• Simple Interface to SRAM-based CPLDs
• Compatible with Cypress Delta39K™ & Quantum38K™
CPLDs
Block Diagram
• Cascadable Read-Back to Support Higher-density CPLDs
• Low-power CMOS EEPROM Process
• Available in PLCC Package (Pin Compatible Across
Product Family)
• Operate at 3.3V V_CC
• System-friendly READY Pin
• Low-power Standby Mode
CEO (A2)
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-03002 Rev. *A
Revised December 28, 2002