CY2XP22ZXC Datasheet, PDF (1/8 Pages) Cypress Semiconductor – Crystal to LVPECL Clock Generator

PRELIMINARY
CY2XP22
Crystal to LVPECL Clock Generator
Features
■ One LVPECL Output Pair
■ Selectable Frequency Multiplication: x2.5 or x5
■ External Crystal Frequency: 25.0 MHz
■ Output Frequency: 62.5 MHz or 125 MHz
■ Low RMS Phase Jitter at 125 MHz, using 25 MHz Crystal
(1.875 MHz to 20 MHz): 0.4 ps (Typical)
■ Phase Noise at 125 MHz:
Offset
Noise Power
1 kHz
–117 dBc/Hz
10 kHz
100 kHz
–126 dBc/Hz
–131 dBc/Hz
1 MHz
–131 dBc/Hz
Logic Block Diagram
■ Pb-free 8-Pin TSSOP Package
■ Supply Voltage: 3.3V or 2.5V
■ Commercial and Industrial Temperature Ranges
Functional Description
The CY2XP22 is a PLL (Phase Locked Loop) based high
performance clock generator that uses an external reference
crystal. It is specifically targeted at FibreChannel and Gigabit
Ethernet applications. It produces a selectable output frequency
that is 2.5 or 5 times the crystal frequency. With a 25 MHz crystal,
the user can select either a 62.5 MHz or 125 MHz output. It uses
Cypress’s low noise VCO technology to achieve less than 1 ps
typical RMS phase jitter. The CY2XP22 has a crystal oscillator
interface input and one LVPECL output pair.
XIN
E xt ernal
Cryst al
CR YS TAL
OSCILLATOR
X OU T
LOW -N OISE
PLL
OUTPU T
D IV IDE R
CLK
CLK#
Pinouts
F _SEL
Figure 1. Pin Diagram - 8-Pin TSSOP
VDD 1
VSS 2
XOUT 3
XIN 4
8
VDD
7
CLK
6
CLK#
5
F_SEL
Table 1. Pin Definition - 8-Pin TSSOP
Pin Number Pin Name
1, 8
VDD
2
VSS
3, 4
XOUT, XIN
5
F_SEL
I/O Type
Power
Power
XTAL output and input
CMOS input
6,7
CLK#, CLK
LVPECL output
Description
3.3V or 2.5V power supply
Ground
Parallel resonant crystal interface
Frequency Select: see Frequency Table
Differential Clock Output
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-10229 Rev. *C
• San Jose, CA 95134-1709 • 408-943-2600
Revised June 15, 2009
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