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CY29973_12 Datasheet, PDF (1/10 Pages) Cypress Semiconductor – 3.3 V 125 MHz Multi-Output Zero Delay Buffer | |||
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3.3 V 125 MHz Multi-Output Zero Delay Buffer
Features
â Output Frequency up to 125 MHz
â 12 Clock Outputs: Frequency Configurable
â 350 ps max. Output to Output Skew
â Configurable Output Disable
â Two Reference Clock Inputs for Dynamic Toggling
â Oscillator or PECL Reference Input
Table 1. Frequency Table[1]
VC0_SEL
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
FB_SEL2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
CY29973
3.3 V 125 MHz Multi-Output
Zero Delay Buffer
â Spread Spectrum Compatible
â Glitch-free Output Clocks Transitioning
â 3.3 V Power Supply
â Pin Compatible with MPC973
â Industrial Temperature Range: â40 °C to +85 °C
â 52-pin TQFP Package
FB_SEL1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
FB_SEL0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
FVC0
8x
12x
16x
20x
16x
24x
32x
40x
4x
6x
8x
10x
8x
12x
16x
20x
Note
1. x = reference input frequency, 200 MHz < FVCO < 480 MHz.
Cypress Semiconductor Corporation ⢠198 Champion Court
Document Number: 38-07291 Rev. *E
⢠San Jose, CA 95134-1709 ⢠408-943-2600
Revised February 5, 2011
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