CY28442-2 Datasheet, PDF (1/22 Pages) Cypress Semiconductor – Clock Generator for Intel Alviso Chipset

PRELIMINARY
CY28442-2
Clock Generator for Intel^ Alviso Chipset
Features
• Compliant to Intel^ CK410M
• Supports Intel Pentium-M CPU
• Selectable CPU frequencies
• Differential CPU clock pairs
• 100-MHz differential SRC clocks
• 96-MHz differential dot clock
• 48-MHz USB clocks
• SRC clocks independently stoppable through
CLKREQ#[A:B]
• 96/100 MHz Spreadable differential clock.
• 33-MHz PCI clock
• Low-voltage frequency select input
• I²C support with readback capabilities
• Ideal Lexmark Spread Spectrum profile for maximum
electromagnetic interference (EMI) reduction
• 3.3V power supply
• 56-pin TSSOP package
CPU
SRC
PCI
REF
DOT96 USB_48
x2 / x3
x5/6
x6
x2
x2
x1
Block Diagram
XIN
XOUT
PCI_STP#
CPU_STP#
CLKREQ[A:B]#
FS_[C:A]
14.318MHz
Crystal
PLL Reference
PLL1
CPU
Divider
VTTPWR_GD#/PD
PLL2
96MSS
Divider
PLL4
FIXED
Divider
SDATA
SCLK
I2C
Logic
Pin Configuration
VDD_REF
REF
IREF
VDD_CPU
CPUT
CPUC
VDD_CPU
CPUT_ITP/SRCT7
CPUC_ITP/SRCC7
VDD_SRC
SRCT[1:5]
CPUC[1:5]
VDD_PCI
PCI
VDD_PCI
PCIF
VDD_48MHz
96_100_SSCT
96_100_SSCC
VDD_48MHz
DOT96T
DOT96C
VDD_48
USB
VDD_REF 1
VSS_REF 2
PCI3 3
PCI4 4
PCI5 5
VSS_PCI ₆
VDD_PCI 7
ITP_EN/PCIF0 8
**96_100_SEL/PCIF1 ₉
VTTPWRGD#/PD 10
VDD_48 11
FS_A/48M_0 12
VSS_48 13
DOT96T 14
DOT96C 15
FS_B/TESTMODE 16
96_100_SSCT 17
96_100_SSCC ₁₈
SRCT1 19
SRCC1 20
VDD_SRC 21
SRCT2 22
SRCC2 ₂₃
SRCT3 24
SRCC3 25
SRCT4_SATA 26
SRCC4_SATA 27
VDD_SRC 28
56 ^{PCI2/SEL_CLKREQ**}
55 PCI_STP#
54 CPU_STP#
53 FS_C(TEST_SEL)/REF0
52 REF1
51 VSSA2
50 XIN
49 XOUT
48 VDDA2
47 SDATA
46 SCLK
45 _{VSS_CPU}
44 _CPUT0
43 CPUC0
42 VDD_CPU
41 CPUT1
40 CPUC1
39 IREF
38 VSSA
37 VDDA
36 CPU2T_ITP/SRCT7
35 CPU2C_ITP/SRCC7
34 VDD_SRC_ITP
33 CLKREQA#/SRCT6
32 CLKREQB#/SRCC6
31 SRCT5
30 SRCC5
29 VSS_SRC
56 pin TSSOP/SSOP
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07691 Rev. **
Revised June 24, 2004