CY28400_05 Datasheet, PDF (1/13 Pages) Cypress Semiconductor – 100-MHz Differential Buffer for PCI Express and SATA

CY28400
100-MHz Differential Buffer for PCI Express
and SATA
Features
Functional Description
• CK409 or CK410 companion buffer
• Four differential 0.7V clock pairs
• Individual OE controls
• Low CTC jitter (< 50 ps)
• Programmable bandwidth
• SRC_STOP# power management control
• SMBus Block/Byte/Word Read and Write support
• 3.3V operation
• PLL Bypass-configurable
• Divide by 2 programmable outputs
• 28-pin SSOP package
The CY28400 is a differential buffer and serves as a
companion device to the CK409 or CK410 clock generator.
The device is capable of distributing the Serial Reference
Clock (SRC) in PCI Express and SATA implementations.
Block Diagram
OE_(1,6)
SRC_STOP#
PWRDWN#
SCLK
SDATA
PLL/BYPASS#
SRCT_IN
SRCC_IN
HIGH_BW#
Output
Control
SMBus
Controller
DIFT1
DIFC1
DIFT2
DIFC2
Output
Buffer
DIFT5
DIFC5
DIV
PLL
DIFT6
DIFC6
Pin Configuration
VDD
SRCT_IN
SRCC_IN
VSS
VDD
DIFT1
DIFC1
OE_1
DIFT2
DIFC2
VDD
PLL/BYPASS#
SCLK
SDATA
1
28
2
27
3
26
4
25
5
24
6
23
7
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
28 SSOP
VDD_A
VSS_A
IREF
VSS
VDD
DIFT6
DIFC6
0E_6
DIFT5
DIFC5
VDD
HIGH_BW#
SRC_STOP#
PWRDWN#
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07591 Rev. *A
Revised June 1, 2005