CY28372 Datasheet, PDF (1/18 Pages) Cypress Semiconductor – SiS 746 AMD Athlon/AMD Duron Clock Synthesizer

CY28372
SiS 746 AMD Athlon™/AMD Duron™ Clock Synthesizer
Features
• Supports AMD Athlon/Duron CPU
• 3.3V and 2.5V power supply
• Eight copies of PCI clocks
• One 48-MHz USB clock
• Two copies of ZCLK clocks
• One 48-MHz/24-MHz programmable SIO clock
• One differential CPU clock (opendrain)
• One singled-ended CPU clock (opendrain)
• SMBus support with readback capabilities
• Spread Spectrum electromagnetic interference (EMI)
reduction
• 48-pin SSOP package
CPU ZCLK
x2
x2
REF
x3
PCI AGP IOAPIC 48M 24_48M
x8
x2
x2
x1
x1
Block Diagram
XIN
XOUT
XTAL
OSC
PLL Ref Freq
PLL 1
**FS0:3
CPU_STP#
Divider
Network
2
PCI_STP#
PLL2
Fract.
Aligner
PD#
2
SDATA
I2C
SCLK
Logic
VDD_REF
REF0:2
VDD_CPU
CPUT1
CPUT0, CPUC0
VDD_Z
ZCLK0:1
VDD_APIC
APIC0:1
VDD_PCI
PCIF0:1
PCI0:5
VDD_AGP
AGP0:1
VDD_48
48 MHz
24_48MHz
Pin Configuration
VDD_REF 1
**FS0/REF0 2
**FS1/REF1 3
REF2 4
GND_REF 5
XIN 6
XOUT 7
GND_Z 8
ZCLK0 9
ZCLK1 10
VDD_Z 11
*PCI_STP# 12
VDD_PCI 13
**FS2/PCIF0 14
*FS3/PCIF1 15
PCI0 16
PCI1 17
GND_PCI 18
VDD_PCI 19
PCI2 20
PCI3 21
PCI4 22
PCI5 23
GND_PCI 24
48 VDD_APIC
47 IOAPIC1
46 IOAPIC0
45 GND_APIC
44 CPU_STP#*
43 CPUT1
42 VDD_CPU
41 GND_CPU
40 CPUT0
39 CPUC0
38 VDD_CPU
37 GNDA
36 VDDA
35 SCLK
34 SDATA
33 PD#*
32 GND_AGP
31 AGP0
30 AGP1
29 VDD_AGP
28 VDD_48
27 48MHZ
26 24_48MHZ
25 GND_48
SSOP-48
* : Internal Pull-up 150k
** : Internal Pull-down 150k
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07533 Rev. *A
Revised September 20, 2004