CY26126 Datasheet, PDF (1/5 Pages) Cypress Semiconductor – Dual Output 125-MHz Clock Generator

5
Advance Information
CY26126
Dual Output 125-MHz
Clock Generator
Features
• Integrated phase-locked loop
• Low skew, low jitter, high accuracy outputs
• 3.3V Operation
Part Number Outputs
CY26126
2
Input Frequency Range
25 MHz
Logic Block Diagram
Benefits
Highest-performance PLL tailored for multimedia applications
Meets critical timing requirements in complex system designs
Output Frequencies
2 copies of 125 MHz (3.3V)
25 XIN
XOUT
OSC.
OE
P Comp
Q
VCO
P
PLL
OUTPUT
MULTIPLEXER
AND
DIVIDERS
VDD
VSS
125 MHz
125 MHz
Pin Configurations
CY26126
8-pin SOIC
XIN 1
VDD 2
OE ³
VSS 4
8
XOUT
7
CLKB
6
CLKA
5
VSS
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-07351 Rev. *A
Revised December 14, 2002